© P.Prinetto - all rights reserved Version 2.0 4.1.14.1 – Digital networks classificationECE 465Digital networksclassificationPaolo PRINETTOPolitecnico di Torino (Italy)University of Illinois at Chicago, IL (USA)[email protected]@uic.eduwww.testgroup.polito.itLecture 4.124.1 Goal• This lecture introduces a taxonomy on digital networks, focusing, in particular, on:− Combinational vs. sequential− Mealy vs. Moore− I/O clustering.34.1 Prerequisites• Module 344.1 Homework• No particular homework is foreseen54.1 Further readings• No particular suggestion64.1 Outline• Combinational vs. sequential networks• Moore vs. Mealy machines• I/O clustering.© P.Prinetto - all rights reserved Version 2.0 4.1.24.1 – Digital networks classificationECE 46574.1 Some graphic conventionsHereinafter:will identify a bus or a set of wireswill identify a single bit wire84.1 Digital networkA proper assembly of electronic devices, designed to store, transform, and communicate information in digital form94.1 Digital networks104.1 Digital networks114.1 Digital networksPrimary Inputs(PIs)Primary Outputs(POs)124.1 Digital networksDigital networks are usually classified as:• combinational• sequential© P.Prinetto - all rights reserved Version 2.0 4.1.34.1 – Digital networks classificationECE 465134.1 A digital network is combinationaliff its POs are completely determined by its present PIs, only.Combinational networkAbstra ctionlevelssyste msyst emRTlogicdevicebehavior structure physic geometryAbstra ctionlevelssyste msyst emRTlogicdevicebehavior structure physic geometryAbstra ctionlevelssyste msyst emRTlogicdevicebehavior structure physic geometry144.1 A digital network is combinationaliff its netlist doesn’t contain any feedback loop.Combinational networkAbstra ctionlevelssyste msyst emRTlogicdevicebehavior structure physic geometryAbstra ctionlevelssyste msyst emRTlogicdevicebehavior structure physic geometryAbstra ctionlevelssyste msyst emRTlogicdevicebehavior structure physic geometry154.1 A digital network is sequential if its POs are a function of past as well as present values of the PIs.Sequential networkAbstra ctionlevelssyste msyst emRTlogicdevicebehavior structure physic geometryAbstra ctionlevelssyste msyst emRTlogicdevicebehavior structure physic geometryAbstra ctionlevelssyste msyst emRTlogicdevicebehavior structure physic geometry164.1 A digital network is sequential if its netlist contains one, or more, feedback loops.Sequential networkAbstra ctionlevelssyste msyst emRTlogicdevicebehavior structure physic geometryAbstra ctionlevelssyste msyst emRTlogicdevicebehavior structure physic geometryAbstra ctionlevelssyste msyst emRTlogicdevicebehavior structure physic geometry1174.1 An exampleSR184.1 An exampleSRSRFeedback© P.Prinetto - all rights reserved Version 2.0 4.1.44.1 – Digital networks classificationECE 465194.1 The concept of stateA sequential circuit must be able to “remember”, or “store”, some information items related to the values the PIs have got. Such a storing capability is accomplished in terms of “internal states”: in any instant, the circuits is in a well defined “state”, univocally represented by the values got by the set of “internal state variables”. 204.1 General structure of a sequential networkCombinationalnetworkPIsPOsFeedback elements214.1 General structure of a sequential networkCombinationalnetworkPIsPOsFeedback elementsThey act as state variablesand their values determine the “state” of the network.224.1 General structure of a sequential networkCombinationalnetworkPIsPOsFeedback elementsPresent-state variablesorSecondary Inputs234.1 General structure of a sequential networkCombinationalnetworkPIsPOsFeedback elementsNext-state variablesorSecondary Outputs244.1 State variables• A sequential network has as many state variables as feedback elements • A network with n state variables is characterized by 2 npossible states.© P.Prinetto - all rights reserved Version 2.0 4.1.54.1 – Digital networks classificationECE 465254.1 Sequential network classificationCombinationalnetworkPIsPOsFeedback elements264.1 Sequential network classificationCombinationalnetworkPIsPOsFeedback elementsAccording to the “feedback elements” nature, sequential networks are classified as:• asynchronous• synchronous274.1 Asynchronous networks• Each feedback element is just a wire. • The information flow through feedback elements is a continuum and not synchronized by any external event.284.1 Asynchronous network structureCombinationalnetworkPIsPOs294.1 Asynchronous network structureCombinationalnetworkPIsPOsPresent-state variablesNext-state variables304.1 Synchronous networks• Each feedback is always performed via a particular device, named Flip-Flop. • Flip-Flop behavior is controlled and timed by an ad-hoc signal, usually referred to as clock.• The information flow through the feedback elements is thus “synchronized” by the clock.© P.Prinetto - all rights reserved Version 2.0 4.1.64.1 – Digital networks classificationECE 465314.1 DQCLKFlip-Flopbehavior324.1 CLKDQCLKClockFlip-Flopbehavior334.1 CLKDDQCLKClockInputFlip-Flopbehavior344.1 CLKDQDQCLKClockInputOutputFlip-Flopbehavior354.1 State registerThe set of Flip-Flops is often referred to as “State Register”, since it stores the network state variables. 364.1 Synchronous network structureCombinationalnetworkPIsPOsState registerCLK© P.Prinetto - all rights reserved Version 2.0 4.1.74.1 – Digital networks classificationECE 465374.1 Finite State MachinesSynchronous networks, being characterized by a finite # of flip-flops, and thus of states, are very often referred to as Finite State Machines (FSMs). 384.1 Reset signal & Reset stateAny FSM, regardless its complexity, must have:• a particular control input signal, named reset signal (or simply reset) characterized by the highest priority• a particular state, named reset state, in which the network moves whenever the reset signalis asserted.394.1 Asynchronous resetCombinationalnetworkPIsPOsState registerCLK reset404.1 Outline• Combinational vs. sequential networks⇒Moore vs. Mealy machines• I/O clustering.414.1 Combinational network splittingCombinationalnetworkPIsPOsState registerCLK reset424.1 Combinational network