•1CPE 528: Session #8 Department of Electrical and Computer Engineering University of Alabama in Huntsville30/01/2003 UAH -CPE528 2Outline® Files® Notes on VHDL Synthesis30/01/2003 UAH -CPE528 3Files® File input/output in VHDL® Used in test benches® Source of test data® Storage for test results® VHDL provides a standard TEXTIO package® read/write lines of text 30/01/2003 UAH -CPE528 4Files (cont’d)® VHDL defines a file object, associated types, and certain limited file operations® File declarations® VHDL87® VHDL93TYPE file_type IS FILE OF type_mark;PROCEDURE READ(FILE identifier : file_type; value : OUT type_mark);PROCEDURE WRITE(FILE identifier : file_type; value : IN type_mark);FUNCTION ENDFILE(FILE identifier : file_type) RETURN BOOLEAN;TYPE file_type IS FILE OF type_mark;PROCEDURE READ(FILE identifier : file_type; value : OUT type_mark);PROCEDURE WRITE(FILE identifier : file_type; value : IN type_mark);FUNCTION ENDFILE(FILE identifier : file_type) RETURN BOOLEAN;FILE identifier : file_type IS [mode] “file_name”;FILE identifier : file_type IS [mode] “file_name”;FILE identifier : file_type [[OPEN mode] IS “file_name”];FILE identifier : file_type [[OPEN mode] IS “file_name”];30/01/2003 UAH -CPE528 5Files (Cont’d) ®VHDL 87 - files are opened and closed when the associated file object comes into and goes out of scope®VHDL 93-- opens a file for readingFILE in_file:bit_file IS “my_file.dat” -- opens a file for writingFILE out_file:bit_file IS OUT “my_other_file.dat”; -- opens a file for readingFILE in_file:bit_file IS “my_file.dat” -- opens a file for writingFILE out_file:bit_file IS OUT “my_other_file.dat”; -- opens a file for readingFILE in_file:bit_file OPEN READ_MODE IS “my_file.dat”; -- Or simply declared (and named and opened later):FILE out_file:bit_file;-- opens a file for readingFILE in_file:bit_file OPEN READ_MODE IS “my_file.dat”; -- Or simply declared (and named and opened later):FILE out_file:bit_file;30/01/2003 UAH -CPE528 6File Opening and Closing® In VHDL93, files can be opened in the declaration or predefined procedures can be used:® The values for FILE_OPEN_KIND are:READ_MODE, WRITE_MODE, and APPEND_MODE® The values for FILE_OPEN_STATUS are: OPEN_OK, STATUS_ERROR, NAME_ERROR, and MODE_ERRORPROCEDURE FILE_OPEN(FILE identifier:file_type;file_name: IN STRING;open_kind: FILE_OPEN_KIND := READ_MODE);PROCEDURE FILE_OPEN(status: OUT FILE_OPEN_STATUS;FILE identifier: file_type;file_name: IN STRING;open_kind: FILE_OPEN_KIND := READ_MODE);PROCEDURE FILE_CLOSE(FILE identifier: file_type);PROCEDURE FILE_OPEN(FILE identifier:file_type;file_name: IN STRING;open_kind: FILE_OPEN_KIND := READ_MODE);PROCEDURE FILE_OPEN(status: OUT FILE_OPEN_STATUS;FILE identifier: file_type;file_name: IN STRING;open_kind: FILE_OPEN_KIND := READ_MODE);PROCEDURE FILE_CLOSE(FILE identifier: file_type);•230/01/2003 UAH -CPE528 7Text Input and Output® Basic file operations in VHDL are limited to unformatted input/output® VHDL includes the TEXTIO package for input and output of ASCII text® TEXTIO is located in the STD library® The following data types are supported by the TEXTIO routines:® Bit, Bit_vector® Boolean® Character, String® Integer, Real® TimeUSE STD.TEXTIO.ALL;USE STD.TEXTIO.ALL;30/01/2003 UAH -CPE528 8TEXTIO Procedures® TEXTIO defines a LINE data type® All read and write operations use the LINE type® TEXTIO also defines a FILE type of TEXT for use with ASCII text® Procedures defined by TEXTIO are:® READLINE(f,k)® reads a line of file f and places it in buffer k® READ(k,v,...)® reads a value of v of its type from k® WRITE(k,v,...)® writes value v to LINE k® WRITELINE(f,k)® writes k to file f® ENDFILE(f) returns TRUE at the end of FILE30/01/2003 UAH -CPE528 9Using TEXTIO® Reading from a file® READLINE reads a line from the file into a LINE buffer® READ gets data from the buffer® Writing to a file® WRITE puts data into a LINE buffer® WRITELINE writes the data in the LINE buffer to file® READ and WRITE have several formatting parameters® Right or left justification® Field width® Unit displayed (for time)30/01/2003 UAH -CPE528 10TEXTIO: Example 1USE STD.TEXTIO.ALL; --TEXTIO package is availableTYPE state IS (reset, good); - new type state is declaredPROCEDURE display_state (current_state : IN state) ISVARIABLE k : LINE; -- buffer k of type LINE-- file flush is of type TEXT and will output to consoleFILE flush : TEXT IS OUT "/dev/tty"; VARIABLE state_string : STRING(1 to 7); -- text valueBEGINCASE current_state ISWHEN reset => state_string := "reset ";WHEN good => state_string := "good ";END CASE;WRITE (k, state_string, LEFT, 7); --left justified, 7sWRITELINE (flush, k); -- send buffer to file flushEND display_state;USE STD.TEXTIO.ALL; --TEXTIO package is availableTYPE state IS (reset, good); - new type state is declaredPROCEDURE display_state (current_state : IN state) ISVARIABLE k : LINE; -- buffer k of type LINE-- file flush is of type TEXT and will output to consoleFILE flush : TEXT IS OUT "/dev/tty"; VARIABLE state_string : STRING(1 to 7); -- text valueBEGINCASE current_state ISWHEN reset => state_string := "reset ";WHEN good => state_string := "good ";END CASE;WRITE (k, state_string, LEFT, 7); --left justified, 7sWRITELINE (flush, k); -- send buffer to file flushEND display_state;® This procedure displays the current state of a FSMIf we call this procedure again ...30/01/2003 UAH -CPE528 11TextIO: Read_v1dprocedure read_v1d (variable f :in text ; v : out std_logic_vector ) isvariable buf : line;variable c : character ;begin -- do not forget appropriate library declarationsreadline(f , buf ); --read a line from the file.for i in v ’range loopread( buf , c ) ; --read a character from the line.case c iswhen ‘ X ’ => v (i) := ‘ X ’ ;when ‘ U ’ => v (i) := ‘ U ’ ;when ‘ Z ’ => v (i) := ‘ Z ’ ;when ‘ 0 ’ => v (i) := ‘ 0 ’ ;when ‘ 1 ’ => v (i) := ‘ 1 ’ ;when ‘ -’ => v (i):= ‘ -’ ;when ‘ W ’ => v (i) := ‘ W ’ ;when ‘ L ’ => v (i) := ‘ L ’ ;when ‘ H ’ => v (i) := ‘ H ’ ;when others => v (i) := ‘ 0 ’;end case;end loop;end;30/01/2003 UAH -CPE528 12Longer TextIO exampleLIBRARY IEEE;USE STD.TEXTIO.ALL;USE IEEE.STD_LOGIC_TEXTIO.ALL;USE IEEE.STD_LOGIC_1164.ALL; ENTITY square IS PORT( go : IN std_logic); END square; ARCHITECTURE simple OF square IS BEGIN PROCESS(go) FILE infile: TEXT IS IN