Power Electronics Lab1Lecture 8ECEN 4517/5517Exp. 4: Step-up dc-dc converter (cascaded boost converters)Analog PWM and feedback controller to regulate HVDCExperiments 4-5: inverter systemExp. 5: DC-AC inverter (H-bridge)Power Electronics Lab2Due datesThis week in lab (Mar. 2 – 4):Nothing due. Finish Exp. 3.Next week in lecture (Mar. 9):Prelab assignment for Exp. 4 (one from every student)The following week, in lecture (Mar. 16):Midterm exam, to cover Exps. 1-3After Spring break, in lab (Mar. 30 – Apr. 1):Exp. 3 part 2 report duePower Electronics Lab3Goals in upcoming weeksExp. 4: Step-up dc–dc converterController IC:Demonstrate operating PWM controller IC (UC3525)Power Stage:Demonstrate operating power converter (cascaded boost converters)Closed-Loop Analog Control System:Demonstrate analog feedback system that regulates the dc output voltageMeasure and document loop gain and compensator designGraduate Section:Develop and verify system loss budgetAnalytical model of control-to-output transfer functionPower Electronics Lab4Step-up DC-DC cascaded boost convertersNext week’s prelab assignment Need to step up the 12 V battery voltage to HVDC (120-200 V)We will build inverter capable of producing same rated power as PV panel (85 W)How much power can you get using the parts in your kit?How efficient can your design be?Key limitations:MOSFET on-resistances, rated voltagesCapacitor rms current ratings, rated working voltagesSwitching lossInductor (core + dc copper + proximity) loss, saturation currentNeed to choose duty cycles, switching frequency, inductancesMust ensure that all components operate within their specified limitsDesign inductorsPower Electronics Lab5Converter loss budgetAn exampleOperating point: Vin = 13 V, Vout = 200 V, Pout = 85 WMOSFET conduction loss 2.2 WDiode conduction loss 1.5 WSwitching loss 3.5 WInductor loss (core + dc copper + proximity) 4.3 W Total loss: 11.5 W Predicted efficiency: 88%(must document calculations to support above values)Power Electronics Laboratory The UC3525 PWM Control ICKey functions:Oscillator (sawtoothwave generator)PWM comparatorand latchError amplifier5.1 V referencePulse-steering logicOutput driversShutdown and soft-start circuitryPower Electronics Laboratory How a pulse-width modulator worksSawtoothwavegenerator+–vsaw(t)vc(t)comparatorδ(t)PWMwaveformanaloginputvsaw(t)VM0δ(t)tTsdTsvc(t)02TsPower Electronics Laboratory Equation of pulse-width modulatorvsaw(t)VM0δ(t)tTsdTsvc(t)02TsFor a linear sawtooth waveform:d(t)=vc(t)VMfor 0 ≤ vc(t) ≤ VMSo d(t) is a linear function of vc(t).Power Electronics Laboratory Sawtooth (Ramp) OscillatorPower Electronics Laboratory Simplified Block Diagram of OscillatorI =(5.1 V) – 2(0.7 V)RTVmax= (5.1 V)14 kΩ14 kΩ + 7.4 kΩ= 3.3 VVmin= (5.1 V)2kΩ || 14 kΩ2kΩ || 14 kΩ + 7.4 kΩ= 1.0VBlanking pulse causes driveroutputs to be low, so that dTs ≤ tcIncreasing RD reduces maximumallowed duty cycle DmaxvTVmaxVminCharge interval tCI charges CTDischarge interval tDRD discharges CTSwitching period TsI /CTVM =Vmax – VminiT= CTdvTdthencedvTdt=iTCT+–CurrentmirrorRTCTRD5.1 V Reference VrefIISawtooth (Ramp)signal vTBlanking pulseComparator657UC3525 Oscillator section7.4 kΩ14 kΩ2 kΩiT+vT–Power Electronics LabError Amplifier+_9+_12v1v2i9model:gm(v2 - v1)129to PWM comparatorgmTransconductance amplifierPower Electronics LabError Amplifier with Load9+_12v1v2i9Z(s)gm(v2 - v1)))((129vvsZgvm−=The differential voltage gain is: gmZ(s)With large Z(s), the differential voltage gain is large. The data sheet specifies a low-frequency differential voltage gain of at least 1000 (60 dB).Power Electronics LabConnect to produce adjustable D129to PWMcomparatorgmvcompinternal Z(s)Vrefpin 16external potvinThe error amplifier is connected as a unity-gain stage: vcomp= vinThe duty cycle D can be adjusted by the external pot.Power Electronics LabOutputs of the UC3525AOutput of PWM comparatorFlip-flop output QFlip-flop output QOutput AOutput BDTsTsoutput A output B11 14VC13output ofPWMcomparatorflip-flopoutput Qflip-flopoutput QFrequency of the outputs is one half the oscillator frequency. Duty cycle cannot be greater than 50%.Such outputs are needed in some types of switching converters such as “push-pull.”Outputs A and B can be OR-ed to restore the PWM pulses at the oscillator
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