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CU-Boulder ECEN 4517 - Lecture 10

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Power Electronics Lab1Lecture 10ECEN 4517/5517Experiment 5Inverter systemExp. 4 Exp. 5Power Electronics Lab2Due datesThis week in lab (Mar. 30 – Apr. 1):Exp. 3 Part 2 report dueNext week in lecture (Apr. 6):Exp. 5 prelab duePower Electronics Lab3Exp. 5H-bridge inverter, off grid• Filtering of ac output not explicitly shown• Need MOSFETs and half-bridge gate drivers• Grid-tied: control iac(t)• Off-grid: control vac(t)Exp. 5: off-grid inverter• Demonstrate modified sine-wave inverter (required)• Demonstrate PWM inverter (extra credit)+HVDCfrom Exp. 4–Power Electronics Lab4“Modified Sine-Wave” Invertervac(t) has a rectangular waveformInverter transistors switch at 60 Hz, T = 8.33 msecT/2DT/2+ VHVDC– VHVDCvac(t)RMS value of vac(t) is:     • Choose VHVDC larger than desired Vac,RMS• Can regulate value of Vac,RMS by variation of D• Waveform is highly nonsinusoidal, with significant harmonicsPower Electronics Lab5PWM InverterAverage vac(t) has a sinusoidal waveformInverter transistors switch at frequency substantially higher than 60 Hz• Choose VHVDC larger than desired Vac,peak• Can regulate waveshape and value of Vac,RMS by variation of d(t) (programming inside microcontroller)• Can achieve sinusoidal waveform, with negligible harmonics• Higher switching frequency leads to more switching loss and need to filter high-frequency switching harmonics and common-mode currents• For the same Vac,RMS, need larger VHVDCtvac(t)Power Electronics Lab6Two ways to generate a PWM sinusoidtvac(t)(a) Operate left and right sides with same (complementary) gate drive signalsv(t) = (2d(t) – 1) Vg(b) PWM one side, while other side switches at 60 Hzv(t) = ± d(t) VgTwo-level waveformThree-level waveformPower Electronics Lab7Controlling the inverterMSP430 generates logic signals to control the four gate drivers• Control MSP430 timer (you could use A or B or simply use logic outputs) to generate MOSFET drive signalsYour goal: adjust Vref and inverter duty cycle to obtain Vac = 120 V rmsPower Electronics Lab8Gate drive timingQ1Q2Q3Q4T = 16.67 msecDTdeadtimeT/2• For modified sine wave inverter: switch once per ac half cycle. Adjust duty cycle to control rms voltage. • You decide how to do this / which timer to use • Require deadtime > (switching/delay times of MOSFETs plus gate drivers); otherwise, simultaneous conduction of Q1 and Q2 causes “shoot-through” current that can damage MOSFETs.Power Electronics Lab9Half-bridge Gate DriverFAN 73832Contains two MOSFET drivers:• Low side driver• High side driverHigh side driver includes• Level-shifting circuitry• Provisions for bootstrap power supplyUndervoltage lockout circuitry holds MOSFETs off when driver power supply is below threshholdPower Electronics Lab10Half bridge gate driver circuit exampleHigh side circuitry includes external diode and capacitor for bootstrap power supplyTo charge bootstrap capacitor, low side MOSFET must conductIn this example, VCC = 12 VPower Electronics Lab11Filtering the ac outputRemoving the high frequency differential and common mode components of the output waveformNote: the “Kill-a-Watt” power meters cannot tolerate high frequency components in the ac voltage waveform. Do not connect these meters to an unfiltered inverter


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