controlControl UnitCPU hardware that controls instruction execution• sends signals to the datapath to operate it• specifies what operations to perform, what data to move, whentomoveit,wheretomoveitcontrolControl SignalsMany control signals driven by the instruction[ opcode ] [rs][rt][rd][shamt][func] R-type [ opcode ] [rs][rt][ displacement ] I-type [ opcode ] [ address ] J-type Regularity of the MIPS formats• opcode always in bits 31-26 (Op[5-0])• source registers are always rs & rt• base register always rs• branch offset always bits 15-0controlOur R2000 Control SignalsRegister file• register write signal: RegWrite asserted for R-type instructions &load• register destination field: RegDst rt, rd• results value: MemToReg loaded value, R-type instruction result• all generated by the opcodeALU• type of the second operand: ALUSrc register, immediate• generated by the opcode• ALU operation: ALUOp add, subtract, and, or, set-on-less-than• generated by a small control unit• inputs: opcode & func field• output: ALU operation• examples:lw/sw => addbeq => subtractR-type instruction => func valuecontrolOur R2000 Control SignalsMemory• read signal: MemRead• write signal: MemWrite• both generated by the opcodeBranch control• new PC value: PCSrcincremented PC, target address• generated by the opcode AND’d with ZeroJump control• new PC value: Jumpincremented PC or target address, jump address• generated by the opcodecontrolChanging the ImplementationHow should you approach a problem in which you had to redesignthe implementation to include another instruction?• What does the instruction do?• What parts of the datapath does it need?• Can it use what is there already?• What new logic or registers does it need?• How is the datapath activated?• What control lines does it need• Where should the control lines come
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