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UW CSE 378 - Computer Architecture

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What is Computer Architecture?Another definition: Instruction Set Architecture (ISA)Computer structure: Von Neumann modelComputer OrganizationAdvances in technologyIllustration of Moore’s LawPower DissipationEvolution of Intel Microprocessor SpeedsSome Computer familiesMore computer familiesMIPS is a RISCRegistersRegisters (ct’d)Memory systemInformation unitsMemory addressingAddressingAddressing wordsBig-endian vs. little endianThe CPU - Instruction Execution CycleWhat’s in an instruction?01/14/19 CSE378 Gen. Intro 1What is Computer Architecture?It’s the study of the ___________ of computers•Structure: static arrangement of the parts•Organization: dynamic interaction of the parts and their control•Implementation: design of specific building blocks•Performance: behavioral study of the system or of some of its components01/14/19 CSE378 Gen. Intro 2Another definition: Instruction Set Architecture (ISA)•Architecture is an interface between layers•ISA is the interface between hardware and software•ISA is what is visible to the programmer (and ISA might be different for O.S. and applications)•ISA consists of:–instructions (operations and how they are encoded)–information units (size, how they are addressed etc.)–registers (or more generally processor state)–input-output control01/14/19 CSE378 Gen. Intro 3Computer structure: Von Neumann modelMemory hierarchyI/Ocontrol ALURegistersPCstateMemory busI/O busCPUData path +Control01/14/19 CSE378 Gen. Intro 4Computer Organization•Organization and architecture often used as synonyms•Organization (in this course) refers to:–what are the basic blocks of a computer system, more specifically•basic blocks of the CPU•basic blocks of the memory hierarchy–how are the basic blocks designed, controlled, connected?•Organization used to be transparent to the ISA.•Today more and more of the ISA is “exposed” to the user/compiler.01/14/19 CSE378 Gen. Intro 5Advances in technologyProcessor technology Vacuum tubes Transistors Integrated circuits VLSI Memory technology Vacuum tubes Ferrite core Semi-conductor Semi-conductor Processor structure Single processor Main frames Micros and minis PC’s 64-bit arch Superscalar Multithreaded01/14/19 CSE378 Gen. Intro 6Illustration of Moore’s Law01/14/19 CSE378 Gen. Intro 7Power Dissipation01/14/19 CSE378 Gen. Intro 8Evolution of Intel Microprocessor Speeds01/14/19 CSE378 Gen. Intro 9Some Computer families•Computers that have the same (or very similar) ISA–Compatibility of software between various implementations•IBM–704, 709, 70xx etc.. From 1955 till 1965–360, 370, 43xx, 33xx From 1965 to the present–Power PC•DEC–PDP-11, VAX From 1970 till 1985–Alpha (now Compaq, now HP) in 1990’s01/14/19 CSE378 Gen. Intro 10More computer families•Intel–Early micros 40xx in early 70’s–x86 (086,…,486, Pentium, Pentium Pro, Pentium 3, Pentium 4) from 1980 on–IA-64 (Itanium) in 2001•SUN–Sparc, Ultra Sparc 1985 0n•MIPS-SGI–Mips 2000, 3000, 4400, 10000 from 1985 on01/14/19 CSE378 Gen. Intro 11MIPS is a RISC•RISC = Reduced Instruction Set Computer•R could also stand for “regular”•All arithmetic-logical instructions are of the form•MIPS (as all RISC’s) is a Load-Store architecture–ALU operates only on operands that are in registers–The only instructions accessing memory are load and storec ba Rop R R 01/14/19 CSE378 Gen. Intro 12Registers•Registers are the “bricks” of the CPU•Registers are an essential part of the ISA–Visible to the hardware and to the programmer•Registers are–Used for high speed storage for operands. For example, if variables a,b,c are in registers 8,9,10 respectivelyadd $8,$9,$10 # a = b + c–Easy to name (most computers have 32 registers visible to the programmer and their names are 0, 1, 2, …,31)–Used for addressing memory01/14/19 CSE378 Gen. Intro 13Registers (ct’d)•Not all registers are “equal”–Some are special-purpose (e.g., register 0 in MIPS is wired to the value 0)–Some are used for integer and some for floating-point (e.g., 32 of each in MIPS)–Some have restricted use by convention (cf. App. A pp A-22-23)–Why no more than 32 or 64 registers•Well, sometimes there is (SPARC, Itanium, Cray, Tera)•Smaller is faster•Instruction encoding (names have to be short)•There can be more registers but they are invisible to the ISA –this is called register renaming (see CSE 471)01/14/19 CSE378 Gen. Intro 14Memory system•Memory is a hierarchy of devices with faster and more expensive ones closer to CPU–Registers–Caches (hierarchy: on-chip, off-chip)–Main memory (DRAM)–Secondary memory (disks)01/14/19 CSE378 Gen. Intro 15Information units•Basic unit is the bit (has value 0 or 1)•Bits are grouped together in units and operated on together:–Byte = 8 bits–Word = 4 bytes–Double word = 2 words–etc.01/14/19 CSE378 Gen. Intro 16Memory addressing•Memory is an array of information units–Each unit has the same size–Each unit has its own address–Address of an unit and contents of the unit at that address are different address012-123170contents01/14/19 CSE378 Gen. Intro 17Addressing•In most of today’s computers, the basic unit that can be addressed is a byte–MIPS is byte addressable•The address space is the set of all I-units that a program can reference–The address space is tied to the length of the registers–MIPS has 32-bit registers. Hence its address space is 4G bytes–Older micros (minis) had 16-bit registers, hence 64 KB address space (too small)–Some current (Alpha, Itanium, Sparc, Altheon) machines have 64-bit registers, hence an enormous address space01/14/19 CSE378 Gen. Intro 18Addressing words•Although machines are byte-addressable, words are the most commonly used units•Every word starts at an address divisible by 4Word at address 0Word at address 4Word at address 801/14/19 CSE378 Gen. Intro 19Big-endian vs. little endian•Byte order within a word:001231 2 3Little-endian (we’ll use this)Big-endian01/14/19 CSE378 Gen. Intro 20The CPU - Instruction Execution Cycle•The CPU executes a program by repeatedly following this cycle1. Fetch the next instruction, say instruction i2. Execute instruction i3. Compute address of the next instruction, say j4. Go back to step 1•Of course we’ll optimize this but it’s the basic concept01/14/19 CSE378 Gen. Intro 21What’s in an instruction?•An


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