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UW
CSE 378 -
Modern Trends in Processor Design
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University of Washington
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Modern Trends in Processor Design #2AMD Athlon SpecificsCSE 378Quiz Section #7Modern Trends in Processor Design #2AMD Athlon Specifics- 30+ million transistors; clock speeds > 1 GHz- Front end of the processor translates incoming CISC stream into RISC86/MacroOp instructions- RISC86 instructions are passed to instruction control unit, which manages up to 72 instructions at once. The instructions are scheduled here. Up to 9 instructions may issue per cycle.- There are 9 pipelines: 3 integer, 3 address calculation, 3 FP/MMX. Integer pipelines have 10 stages.- The instruction control unit also handles commits (up to 9 per cycle)- Branch prediction table has 2048
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