U of U CS 3710 - Controller modification, memory mapping, assembly code

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CS/EE 3710 — Computer Design LabLab 2 — Mini-MIPS processorController modification, memory mapping, assembly codeDue Thursday, September 23rd, 2010Laboratory ObjectivesThe objectives of this lab are to understand and extend a very very simply processor, read and writeto block memory on the Xilinx chip, use memory mapped I/O with your processor, use the switches andLEDs on the Spartan3e board, and write a program to run on your processor. This will give you a start onseeing the bigger picture for your semester project by essentially doing a simpler version of most of thebasic tasks. To accomplish this, do the following:1. Read and understand the code for the tiny MIPS processor. This processor is from the CMOS VLSIDesign book by Weste and Harris. The Verilog code from the appendix of that book is on the classweb site in mips.v.2. Read and understand the exmem.v code, also on the class web site, that implements a 256 bytememory module used by the mips.v code.3. Read and understand the fibn.asm code on the class web site that runs on the combined mips.v/exmem.vcircuit. This code computes the 8th Fibonacci number and stores the answer (0D hex) in memorylocation 255.4. I’ll also hand out an excerpt from the book that describes the processor that you should read andunderstand. This describes the instructions, the instruction encoding, the initial Fibonacci code, theblock diagram of the processor, and the control finite state machine.5. Modify the mips.v controller to include an ADDI (add-immediate) instruction to the instruction set.This instruction (listed in Table 1.7 in the MIPS handout) is an “I” format instruction that takes tworegister arguments $1 and $2, and an 8-bit immediate value. The function is $1 ← $2 + imm.6. Modify the mips.v/exmem.v system with very simple memory mapped I/O. The memory map willuse the top two address bits to define regions of memory. If the top two bits are 11, then you arereading and writing to and from I/O space. Reading from I/O space will load the value on the fourswitches, and writing to I/O space will write the register value to the LEDs on the FPGA board.7. Write a new Fibonacci assembly program that computes all of the first 14 Fibonacci numbers (num-bered 0 through 13) and stores them in consecutive memory locations starting at location 128. Thenthe program should enter a loop where it reads the value on the switches and uses that as an address.The value in memory at that offset from address 128 (i.e. the Fibonacci number with that index)should be displayed on the LEDs.8. Demonstrate your mini-MIPS processor running your Fibonacci code on your Spartan3e board. Thedemo will involve loading your processor onto the Spartan3e part, and your Fibonacci code into ablock RAM. Then your processor will run that code. With the code running you should be able toset the switches to number 0 through 13 (0 through 0D hex) and have the n-th Fibonacci numbershow up on the LEDs.1Details and DiscussionThis may seem like a daunting lab, but break it into pieces and it’s not so bad! First you should readthe handout from the book and make sure you understand the processor’s instruction set, and the givenFibonacci code. If you understand what each instruction does, then you should be able to “execute” theprogram in your head or on paper to see what’s happening. You don’t really need to step through eachinstruction on paper, but do make sure you understand what’s going on.Adding the ADDI instructionI would first take a look at Fig 1.54 and understand the control state machine that makes the processorwork. Note that this is a strange little processor - it has 8-bit data paths (thus 8-bit registers), but a 32-bitinstruction format. The memory is a 256 word, 8-bit memory. So, each instruction takes 4 bytes, and thusfour locations in memory. This means that the instruction fetch portion of the state machine takes fourcycles. After those four memory reads, the 32-bit instruction is in the Instruction Register and you canproceed to decode and execute that instruction.If you walk thought the state machine you should be able to understand how each of the instructionsin Table 1.7 are executed. This will let you decide how to add the ADDI instruction to the processor. Youmay need to add states to the state machine. You may need to add other support in the Verilog code. As ahint, if you’re adding a LOT of stuff to the Verilog code you’re probably making it more complex than itneeds to be. It’s a fairly simple change to the code.Once you have the ADDI instruction added to the code, you should be able to execute the Fibonaccicode in Fib 1.51 in the ISE simulator and make sure that your ADDI is working properly. The code isworking properly if it correcly computes the 8th Fibonacci number (starting at 0 the 8th Fibonacci numberis 1101 or 0D hex) and stores it in memory location 255.See the exmem.v code on the web site to see both how to implement memory in the Block RAM, andhow to initialize that memory with a program. You basically use a data file that Verilog loads into thatmemory. This data file is also used by the ISE tool when it’s building the Xilinx programming informationso that the Block RAM on the FPGA also gets loaded with that data.Memory Mapped I/ONow that you have a working mini-MIPS processor with an ADDI instruction, you should look atmodifying the memory system so that you can read a value from the switches and write to the LEDs. Thetechnique to use is to map those I/O devices into the memory space of your mini-MIPS. What this meansis that for a certain range of memory addresses, reading and writing to that range of addresses has the sideeffect of reading or writing to the I/O device instead of actually writing to memory.In this case, you should divide your memory space into four equal sections. The memory for thisprocessor is extremely limited - it’s only 256 memory locations because the address is only 8-bits. Forthis lab the memory will be divided into four regions of 64 locations each. The first three will be “regular”memory, and the upper section will be I/O. You can decide what region of memory you’re in by lookingat the top two address bits. If those top address bits are 00, 01, or 10, you are in “regular” memory. Ifthose top two address bits are 11, then you are in the “I/O” region of memory.If you read from a memory address with 11 in the top two bits you should get the value that’s on theswitches. If


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