Fall 2011 Course Title and Number Electronic Design I, EE122 Instructor Prof. David W. Parent Contact Information ENGR 355, (408) 924-3963, [email protected] Office Hours M: 10:15-12:15 T: 10:00-12:00 W: 10:15-11:30 2:00-4:00 Class Location and Schedule Code: 40514, ENGR 303, MW 9-10:15 Coordinator: Parent Course Description: The analysis and design of electronic circuits based on operational amplifiers (opamps), diodes, metal oxide semiconductor (MOS) transistors and bipolar junction transistors (BJTs), as applied to the contempary issues of biomedical devcies and power generation (solar cell modules), and power useage. Electronic CAD tools (LTPSICE) will be used extensively, Introduction to PCB board design. Prerequisite: EE110 and related background in circuit analysis, transient and frequency responses Textbook(s) and Other Required Material: The required textbook is Fundamentals of Microelectronics by Behzah Razavi ISBN978—0-471-47846-1 www.wiley.com/college/razavi Grading: Two midterm exams 35% (17.5% each) Homeowrk/Quiz/Project 15% Final exam 30% Lab grade 20% (Provided by the lab instructor.) Extra Credit for mini projects Grade % Breakdown 94% and above A 93% - 90% A- 89% - 87% B+ 86% - 84% B83% - 80% B- 79% - 77% C+ 76% - 74% C 73% - 70% C- 69% - 67% D+ 66% - 64% D 63% - 60% D- below 60% F Exams: Dates of exams are shown on the course syllabus. All exams are closed book and aid sheet will be provided. There will be two midterms and one final exam. Homework Sets: Homework will be assigned as shown on the attached schedule. The homework will be graded or a five minute quiz will be given on one of the homework problems. Homework should be done in teams of up to three students, and one copy with the names of the group members who worked on the homework set.Course Syllabus and Schedule 1 Introduction to Course 1.1-1.4 2 STC response, tolerance of passive devices, OPAMP open loop gain. 8.1 3 Non-inverting Opamps/ Inverting Opamps when the source voltage has a series resistance 8.2 4 Difference Amplifiers/ Frequency Response Notes 5 Opamps DC Imperfections, Bandwidth Response with Finite Gain, Slew Rate 8.4 6 Non-linear Circuits, Lorenz Attractors, Absolute Value, Log amplifiers 8.3 7 Diodes for signal processing, extracting Is, n, and Rs of a diode Notes 8 Diodes for signal processing, extracting Is, n, and Rs of a diode 9 Small signal analysis of diodes 10 Solar Cells http://pvcdrom.pveducation.org/index.html11 Review for Exam 12 EXAM I Opamps and Diodes 13 EXAM I Solutions 14 MOS Transistors Device Physics 6.1, 6.2 15 MOS Transistors at DC 6.2 6.3 6.4 16 CS Amplifier 7.1 17 MOS Amplifiers 7.2, 7.3 7.4 No Class No Class 18 CS amplifier for neural interfacing Notes 19 DC CMOS Inverters 15.1 15.2 20 Switching CMOS Inverter 15.3 21 Review for Exam22 EXAM II MOS Transistors 23 EXAM II Solutions 24 Class A A/B and D amplifiers 13 25 Differential pairs/ current mirrors 10.1 10.3 26 Device physics BJT Transistors 4.1-4.3 27 Biasing BJT 4.4 28 Common Emitter BJT Amplifiers 5.1, 5.3 29 Common Emitter BJT Amplifiers 5.1, 5.3 30 Course Review Final Exam TBD M: Monday, T: Tuesday, W: Wednesday, R: Thursday, F: FridayLearning Objectives: 1. Determine the circuit characteristics for a non-ideal operational amplifier. 2. Determine the characteristics of common mode and differential mode inputs. 3. Design operational amplifier circuits to meet specific amplification, bandwidth, and CMRR specifications. 4. Calculate the terminal characteristics of a PN Junction with voltage, current and temperature parameters. 5. Analyze and design half-wave and full-wave rectification circuits. 6. Analyze and design limiting and clamping diode circuits. 7. Analyze and design zener diode voltage regulating circuits. 8. Determine the circuit model parameters of a MOSFET using process parameters. 9. Analyze and design MOSFET circuit characteristics for specific DC parameters. 10. Analyze and design single stage MOSFET amplifiers. 11. Calculate the circuit parameters of a MOSFET inverter. 12. Design CMOS logic gates. 13. Determine the circuit model parameters of a BJT using process and data sheet parameters. 14. Analyze and design BJT circuit characteristics for specific DC parameters. 15. Design single stage BJT amplifiers and analyze input impedance, output impedance and gain characteristics. 16. Design, build and test circuits, as a team, with opamps, diodes, MOS and BJT transistors. 17. Keep an individual lab notebook. 18. Write laboratory reports on the individual laboratory projects. Relationship to Program Objectives and ABET Program Criteria Program Objectives Course Learning Objectives Level of Support (a) an ability to apply knowledge of mathematics, science, and engineering 1 16 Advanced(b) an ability to design and conduct experiments and analyze and interpret data 1 16 Advanced(c) an ability to design a system, component, or process to meet desired needs 3, 5, 6, 7, 9, 10, 14, 15, 16 Advanced(d) an ability to function on multi-disciplinary teams 16 Moderate(e) an ability to identify, formulate, and solve engineering problems 1 16 Advanced(f) an understanding of professional and ethical responsibility (g) an ability to communicate effectively 16 18 Moderate(h) to understand the impact of engineering solutions in a global and societal context (i) a recognition of the need for, and an ability to engage in life-long learning (j) a knowledge of contemporary issues (k) an ability to use techniques, skill and engineering tools necessary for practice. 16 Moderate(l) one or more technical specialties that meet the needs of Silicon Valley companies 1 18 AdvancedProgram Criteria Course Learning Objectives Level of Support Knowledge of probability and statistics Knowledge of mathematics through differential and integral calculus, basic sciences, and engineering sciences necessary to analyze and design complex devices 1 18 AdvancedSystems containing hardware and software components 16 Moderate EE HONOR CODE The Electrical Engineering department will enforce the following Honor Code that must be read and accepted by all students. I have read the Honor Code and agree with its provisions. My continued enrollment in this course constitutes full acceptance of this code. I will NOT: • Take an exam in place of