2 OPERATIONAL AMPLIFIERS THE IDEAL OPERATIONAL AMPLIFIER An ideal operational amplifier is a dependent voltage source whose output voltage outVrelative to ground is proportional to difference between its two input voltages 1inV and 2inV . ()21out V in inVAVV=− [2-1] 21in inVV−is referred to as differential input voltage and denoted asdV . 21din inVV V=− [2-2] The proportionality factorVAis the differential gain which also referred to as open-loop gain. The input terminal designated by minus sign ""−is called inverting terminal. The output of op-amp outV due to signal which find its way to inverting terminal is 180Dout of phase with input signal. 2out V inVAV=− [2-3]2 OPERATIONAL AMPLIFIERS Chapter 2 The input terminal designated by plus sign ""+is called the non-inverting terminal. The output of op-amp outV due to signal which find its way to non-inverting terminal is in phase with input signal. 1out V inVAV= [2-4] +−non inverting−invertingoutVdV++−−±±1inV2inV0VA< Figure 2-1: Ideal operational amplifier The operational amplifier, op-amp amplifies the difference between the voltage signals applied at its two input terminals and amplifies it by gain VA as the output voltage. 12inVVV=− [2-5] ()12out V in VVAVAVV== − [2-6] ±++−−inVVinAV−+−outV Figure 2-2 : Low frequency equivalent circuit of operational amplifier The open loop gain is very high and is frequency independent VA=∞ [2-7]Chapter 2 MICROELECTRONIC CIRCUITS 3 The voltage drop across the two terminals is zero. 21in inVV= [2-8] The input resistance is infinite inR=∞ [2-9] Since for an ideal op-amp, input resistance inR is infinite, the current flow to Inverting as well as non-inverting terminals is zero. 1200IandI== [2-10] The output resistance is negligible. 0outR= [2-11] The bandwidth is infinite BW=∞ [2-12] Power supply sensitivity is zero 0PSS= [2-13] Common mode rejection ratio is very large. CMRR=∞. [2-14] (common mode rejection ratio 0outV=when 12in inVV= Current Constraint: No current flows through any of the two op-amps input terminals. Voltage Constraint: No voltage drops across the two terminals. When 12in inVV= then 0outV = leads to output resistanceoutR,to be zero4 OPERATIONAL AMPLIFIERS Chapter 2 0outR= [2-15] Ideal operational amplifier characteristics: Input resistance inR=∞ Output resistance 0outR= Voltage gain VA=∞ Bandwidth BW=∞ Output voltage 120outVwhenVV== Table 2-1: Ideal operational amplifier characteristic OPERATIONAL AMPLIFIER BASIC CONFIGURATION: Operational amplifier circuits are classified into two basic configurations: inverting amplifier, and non-inverting amplifier, depending on the applied input voltages. The Inverting Amplifier: Non-inverting terminal of the inverting amplifier is grounded . The input voltage inVis applied through the resistor inRto the inverting terminal as shown in figure 2-3; inV++−−2R1RoutV±0NV=loadRoutR0IV=2I1IinRoutILI Figure 2-3: The inverting amplifier configuration The closed loop gain is defined as;Chapter 2 MICROELECTRONIC CIRCUITS 5 outinVGV [2-16] Since voltage drop across the inverting terminal IVand non-inverting terminal NVis zero. 0outNIVVVVA−=  [2-17] Then 0NIVV== and IVis virtual ground. The current flow through resister 1Ris 11in I inIVV VIRR−=  [2-18] Since the current cannot flow through inverting terminals,12II=.The output voltage is 22 210inout NVVVIR RR=− =− [2-19] The closed-loop gain 21outinVRGVR==− [2-20] is independent of open loop gain VAof op-amp and load resistance loadR The input resistance inRis . 11in ininininVVRRVIR=== [2-21] Output resistance is negligible,0outR=, because of ideal voltage source ()00VI NVAVV=−= at the output. The output current outIwhich is supplied by op-amp is 2out LIII=− [2-22]6 OPERATIONAL AMPLIFIERS Chapter 2 2out outoutloadVVIRR=+ [2-23] outIis function of load resistance loadRas well as feedback resistor2R The inverting voltage amplifier equivalent circuit is shown in the figure 2-4 ±++−−1inRR=inVoutV21inRVR−0outR= Figure 2-4: The inverting op-amp equivalent circuit Example 2.1: In the circuit in figure 2-5. calculate the closed loop gain G, input resistance inRand output resistance outR. inV++−−10kΩ1kΩoutV±0NV=10kΩoutR0IV=2I1IinRoutILI1kΩ1kΩ Figure 2-5: The inverting amplifier circuit Solution:Chapter 2 MICROELECTRONIC CIRCUITS 7 11inVIR= [2-24] 2121out inRVIR VR=− =− [2-25] 10101outinVkVVk=− =− [2-26] 1111in inininVVRRkVIR≡===Ω [2-27] 0outR= [2-28] Example 2.2: inV++−−3R1RoutV±0NV=0IV=4I1I2R6R4R3I2I Figure 2-6: High gain realization op-amp circuit8 OPERATIONAL AMPLIFIERS Chapter 2 Invoking the voltage constraint which implies the voltage drop across the two terminals are zero. 0INVV== [2-29] 11inVIR= [2-30] 12II= [2-31] 23221inRVRI VR=− =− [2-32] 323313inVRIVRRR==− [2-33] 423III=− [2-34] 24113ininVRIVRRR=+ [2-35] 44 3outVRIV=−+ [2-36] 42421131out in in inRRRRVVVVRRRR=− − − [2-37] 2441321outinVRRRGVRRR==− ++ [2-38] Example 2.3:Chapter 2 MICROELECTRONIC CIRCUITS 9 inV++−−2R1RoutV±0NV=loadRoutR0IV=2I1IinRoutILI Figure 2-7: The inverting op-amp outR±++−−1RinVoutVVinAV2RloadRTVTI2ILIOI Figure 2-8: Equivalent circuit 0T load RIIII=++ [2-39] outTOT load R oVVRIIII==++ [2-40] outloadloadVIR= [2-41] 212outVIRR=+ [2-42]10 OPERATIONAL AMPLIFIERS Chapter 2 ()out inooutVAVIR−−= [2-43] 112in outRVVRR=+ [2-44] 112RFRR=+ [2-45] in outVFV= [2-46] 1out out outooutoutVAFV VIRRAF+==+ [2-47] 121outoout out outoutloadVRVV VRRRRAF=++++ [2-48] 12111 11ooutloadRRRRRAF=++++ [2-49] ()121outo loadRRR RRAF=++&& [2-50] 00out oRR=⇒= [2-51] The non-inverting amplifierChapter 2 MICROELECTRONIC CIRCUITS 11 inV++−−2R1RoutVNinVV=loadRoutRIinVV=2I1IinR3I±outI Figure 2-9: The non-inverting amplifier ()out V N IVAVV=− [2-52] Invoking the voltage constraint in N IVVV== [2-53] Invoking the current constraint 3120&III== [2-54] 12out IVVIR=+ [2-55] 11inVIR= [2-56] 21inout IVVV RR=+ [2-57] The closed loop gain 211outinVRGVR==+ [2-58]12 OPERATIONAL AMPLIFIERS Chapter 2 is independent of any load resistanceloadR. The input resistance inRis 30in ininVVRI===∞ [2-59] The output resistance is 0outR= [2-60] The output current outIis 2out out inout load IloadVVVII IRR−=+= + [2-61] 221out in inIVV VIIRR−=== [2-62] 1out