3 The p-n Junction Diode Diodes are one of the most widely used elemental, nonlinear Circuit components. The diode has two terminals denoted by positive terminal or “anode” and negative terminal or “cathode”. Diodes are available in different packaging as shown in figure 3-1. Figure 3-1: Diodes in different package2 THE P N JUNCTION DIODE Chapter 3 Diode displays a low resistance on the order of mΩ in direction of positive terminal to negative terminal and high resistance in order of GΩ in direction of negative terminal to positive terminal. The relationship between the current flowing through the diodes and the voltage appearing across the two terminals are nonlinear. Diodes permit only current flow in one direction easily and prevent current flow in the opposite direction. A diode circuit symbol is shown in figure 3-2. +−anode cathodeiv Figure 3-2: Diode Circuit Symbol Diode can be modeled in many different way pending on what application it is employed. 1.The Ideal diode The Semiconductor diode can be modeled as an ideal diode that its Piecewise linear characteristic is shown in Figure 3-3. Forward biasRiverse bias()on()off Figure 3-3: i-v Characteristic of ideal diode In forward bias condition, when the diode is turned on, its act as short circuit with voltage drop across its two terminal 0v=and current through two terminals 0i>as shown in figure 3.4.Chapter 3 MICROELECTRONIC CIRCUITS 3 +−vi0v=0i >""Diodeis on""Turn onshort circuitor Figure 3-4: Forward biased ideal diode equivalent circuit In reverse bias condition, when the diode is cut off, the current through two terminals of diode is 0i=and voltage across its terminals is 0v>as shown in figure 3-5. """ "Diode off or cutt off−open circuit+_0i=0v< Figure 3-5: reverse biased ideal equivalent circuit Example 3-1: Find the current Iusing ideal diode models. R1kΩI++−−outVinV5V Figure 3-6:Biased diode Solution:4 THE P N JUNCTION DIODE Chapter 3 Ideal model: ()5051in outVVVImARk−−===Ω Example 3-2: The sinusoidal voltage invas shown in figure 3-7 is applied to half rectifier circuit. Draw the output voltage outvdevelops across the resistorR and output-input relationship of circuit. Solution: +−invLRoutv+−invtoutvtoutvinv1slope=+ Figure 3-7:sinusoidal input voltage to diode and its output voltage. Example 3-3: The sinusoidal voltage invas shown in figure 3-8 is applied to half rectifier circuit. Draw the output voltage outvdevelops across the resistorR and output-input relationship of circuit. Solution:Chapter 3 MICROELECTRONIC CIRCUITS 5 ++−−outvLRinvinvtoutvtoutvinv01slope=+ Figure 3-8:Sinusoidal input voltage to diode and its output voltage. Application of ideal diode to perform logic A positive-logic convention denotes logic 0 for 0 volts logic 1 for a positive voltage of 5 volts. Diodes can be employed to perform logic function like OR Diode Logic OR Gate: CAB=⊕ [0-1] the diode logic OR gate is shown in figure 3-9. If 0AVV=and0BVV=, both diodes 1Dand 2Dare off and 0outVV= (logic 0). If either AVor BV or both are 5 volts (Logic 1, high) diodes 1Dand 2Dare on and 5outVV=(high)6 THE P N JUNCTION DIODE Chapter 3 AVBVCVR1kΩ1D2D Figure 3-9: reverse biased ideal equivalent circuit Diode Logic AND Gate: CAB=⊗ (0.2) the diode logic AND gate is shown in figure 3-9. If 0AVV=and0BVV=, both diodes 1Dand 2Dare off and 0outVV= (logic 0). If either AVor BV or both are 5 volts (Logic 1, high) diodes 1Dand 2Dare on and 5outVV=(high AVBVCVR1kΩ1D2DFigure 3-10: reverse biased ideal equivalent circuit BIAS EQUIVALENT: VOLTAGES LOGIC LEVEL VA VB VC A B C 0V 0V 0V 0 0 0 0V 5V 5V 0 1 1 5V 0V 5V 1 0 1 5V 5V 5V 1 1 1 VOLTAGES LOGIC LEVEL VA VB VC A B C 0V 0V 0V 0 0 0 0V 5V 0V 0 1 0 5V 0V 0V 1 0 0 5V 5V 5V 1 1 1Chapter 3 MICROELECTRONIC CIRCUITS 7 ivDV0I−ONOFF0 Figure 3-11: Diode with forward bias voltage drop equivalent circuit +−DVi+−v0I Figure 3-12: Diode model for “ON” and ”OFF” DVis called turn on voltage and for silicon diodes at 27C°room temperature is about0.7V. The sIis called reverse saturation current or generation current0Iand for silicon diode at 27CD room temperature is about1nA. Example 4: Find the current iusing bias equivalent diode model. R1kΩi++−−outVDDV5V8 THE P N JUNCTION DIODE Chapter 3 Figure 3-13: Bias equivalent: ()50 0.74.31VimAk−==Ω Example 5: .+−invLRoutv+−invtoutvtoutvinv0.7V1slope=+0 Figure 3-14 Example-6:Chapter 3 MICROELECTRONIC CIRCUITS 9 ++−−outvLRinvinvtoutvtoutvinv01slope=++−0.7V−0.7 Figure 3-15 BATTERY PLUS RESISTANCE: “ON” state only. ivDV0I−020 30Dvslope r toi∆=== Ω∆ Figure 3-1610 THE P N JUNCTION DIODE Chapter 3 i0DVslope = 20 to 30Dvri∆=≈Ω∆vFigure 3-17: reverse biased ideal equivalent circuit +iDVvDr− Figure 3-18: reverse biased ideal equivalent circuit 0DDvV ir=+ [0-3] EXPONENTIAL:Chapter 3 MICROELECTRONIC CIRCUITS 11 iSi DioderVDVsIZKI−FORWARD BIASREVERSE BIASBREAKDOWN1mAzV− Figure 3-19: reverse biased ideal equivalent circuit 0.7DVV≅ [0-4] 0.5rVV≅ [0-5] CUT-IN voltage zkI= KNEE CURRENT zkV= KNEE VOLTAGE sI= SATURATION CURRENT 1TvnVsiIe=− [0-6] for 5TvnV TvnVsiIe= [0-7] or12 THE P N JUNCTION DIODE Chapter 3 lnTsivnVI= [0-8] Consider the two different operating points: 11TvnVsiIe= [0-9] 22TvnVsiIe= [0-10] 26 25TkTVmVatqο== [0-11] Thermal voltage n=Empirical constant between 1 and 2 for Si diodes. Where IVis small (close to zero) All four diodes conduct 1AIDVVV=+ 0.7AIVV=+ 02ADVVV=− ()00.7 0.7IVV=+ − 0IVV= 30.7BID IVVV V=−=− 110 10 0.710 10AIVVimAk−−−== 19310IVi−−= 010 10ILvvimAk==Chapter 3 MICROELECTRONIC CIRCUITS 13 As Ivincreases in the positive direction 1idecreases and Liincreases. 2112,@Di i D D on node A< 224,@LD outi i D D on node V< 1D,2Dand 4Dconducting 21LDii i<< when 11in ininininVVRRVIR=== [0-12] ZENER DIODES: +−zV +zoVzVzrzI−+− Figure: Equivalent circuit zkI= Knee current zkV= Knee voltage zoV=rated voltage zr= dynamic resistance. zzo z zVV Ir=+ [0-13] at the Q point. Ideal case:14 THE P N JUNCTION DIODE Chapter 3 0zr =Ω zzoVV=(perfect regulation) Zener shunt regulator: RI+−sV+−LR0VzILI +zoVsVzrzI−−+−I+0VLRRLI Figure :Equivalent circuit Line regulation is defined as 0sVV∆∆ assuming LR=∞ Using superposition 0zszozzrRVV VRr Rr=+++ [0-14] 0zszVrVRr∆=∆+ [0-15] load regulation is