LC-3 Instruction Set ArchitectureInstruction Set ArchitectureMemory vs. RegistersInstruction SetOperate InstructionsNOTADD/ANDSlide 8Using Operate InstructionsData Movement InstructionsAddressing ModesLC-3 Addressing ModesPC-RelativeSlide 14LD (Load Data)ST (Store Data)IndirectSlide 18LDISTIBase + OffsetSlide 22LDRSTRLoad Effective AddressLEA (Immediate)Example CodeControl InstructionsSlide 29Condition CodesBranch InstructionSlide 32BR (PC-Relative)Example: Using a BranchSlide 35JMPTRAPAnother ExampleFlow ChartProgram (page 1 of 2)Program (page 2 of 2)LC-3 Data PathData Path ComponentsSlide 44Slide 45Slide 46Summary of ISAQuestions?Slide 491LC-3LC-3 Instruction Set Instruction Set Architecture Architecture Patt and Patel Ch. 5Patt and Patel Ch. 52Instruction Set ArchitectureInstruction Set ArchitectureISA is all of the ISA is all of the programmer-visibleprogrammer-visible components and operations of components and operations of the computer.the computer.–memory organization•address space -- how may locations can be addressed?•addressibility -- how many bits per location?–register set•how many? what size? how are they used?–instruction set•opcodes•data types•addressing modesThe ISA provides all the information needed for someone to write a program in machine language (or translate from a high-level language to machine language).3Memory vs. RegistersMemory vs. RegistersMemoryMemory–address space: 216 locations (16-bit addresses)–addressability: 16 bitsRegistersRegisters–temporary storage, accessed in a single machine cycle•accessing memory generally takes longer than a single cycle–eight general-purpose registers: R0 - R7•each is 16 bits wide•how many bits to uniquely identify a register?–other registers•not directly addressable, but used/effected by instructions•PC (program counter), condition codesLC-3 Overview4Instruction SetInstruction SetOpcodesOpcodes–15 opcodes–Operate (Logical or Arithmetic) instructions: ADD, AND, NOT–Data movement instructions: LD, LDI, LDR, LEA, ST, STR, STI–Control instructions: BR, JSR/JSRR, JMP, RTI, TRAP–some opcodes set/clear condition codes, based on result:•N = negative (< 0), Z = zero, P = positive (> 0)Data TypesData Types–16-bit 2’s complement integer (we’ll get to that soon)Addressing ModesAddressing Modes–How is the location of an operand specified?–non-memory addresses: immediate, register–memory addresses: PC-relative, indirect, base+offsetLC-3 Overview5Operate InstructionsOperate InstructionsOnly three operations: Only three operations: ADD, AND, NOTADD, AND, NOTSource and destination operands are registersSource and destination operands are registers–These instructions do not reference memory.–ADD and AND can use “immediate” mode,where one operand is hard-wired into the instruction.Will show dataflow diagram with each instruction.Will show dataflow diagram with each instruction.–illustrates when and where data moves to accomplish the desired operationLC-3 Overview6NOTNOTNote: Src and Dstcould be the same register.Note: works only with registers.Instructions7ADD/ANDADD/ANDThis zero means “register mode”Instructions8ADD/ANDADD/ANDNote: Immediate field is sign-extended.This one means “immediate mode”Instructions9Using Operate InstructionsUsing Operate InstructionsWith only ADD, AND, NOT…With only ADD, AND, NOT…–How do we subtract?–How do we OR?–How do we copy from one register to another?–How do we initialize a register to zero?10Data Movement Data Movement InstructionsInstructionsLoad -- read data from memory to registerLoad -- read data from memory to register–LD: PC-relative mode–LDR: base+offset mode–LDI: indirect modeStore -- write data from register to memoryStore -- write data from register to memory–ST: PC-relative mode–STR: base+offset mode–STI: indirect modeLoad effective address -- compute address, Load effective address -- compute address, save in registersave in register–LEA: immediate mode–does not access memory11Addressing ModesAddressing Modes•How memory is addressed.How memory is addressed.•Different instructions use different Different instructions use different addressing modes.addressing modes.•Some instructions support more Some instructions support more than one addressing mode.than one addressing mode.12LC-3 Addressing ModesLC-3 Addressing Modes•PC-RelativePC-Relative–Address is a displacement from PC •IndirectIndirect–Use PC-Relative to get address from memory•Base plus OffsetBase plus Offset–Use contents of a register as base address and add offset to find address (most common for load/store architectures)13PC-RelativePC-RelativeThe Problem:The Problem:We want to specify address directly in the We want to specify address directly in the instructioninstruction–But an address is 16 bits, and so is an instruction!–After subtracting 4 bits for opcode and 3 bits for register, we have only 9 bits available for address.Addressing Modes14PC-Relative Addressing ModeThe Solution:Use the 9 bits as a signed offset from the current PC.9 bits allows the offset range to be: -256 ≤ offset ≤ +255We can now form any address X, such that: (PC – 256) ≤ X ≤ (PC +255)Remember that the PC is incremented as part of the FETCH phase; This is done before the EVALUATE ADDRESS stage.15LD (Load Data)LD (Load Data)PC-Relative Addressing Mode16ST (Store Data)ST (Store Data)PC-Relative Addressing Mode17IndirectIndirectThe Problem:The Problem:With PC-relative mode, we can only address With PC-relative mode, we can only address data within 256 words of the instruction.data within 256 words of the instruction.–What about the rest of memory? –How do we access it? Addressing Modes18Solution #1:Solution #1: –Read address from memory location, then load/store to that address.First address is generated from PC and IR First address is generated from PC and IR (just like PC-relative addressing), then (just like PC-relative addressing), then content of that address is used as target content of that address is used as target for load/store.for load/store.Indirect Addressing Mode19LDILDIIndirect Addressing Mode20STISTIIndirect Addressing Mode21Base + OffsetBase + OffsetRemember The Problem:Remember The Problem:With PC-relative mode, can only address data With PC-relative mode, can only address data within 256 words of the instruction.within 256 words of the instruction.–What about the rest of memory?