1 6. THE MOS FIELD EFFECT TRANSISTOR (MOSFET) We begin study of the MOSFET with the simpler MOS Gated Diode, a three terminal device. Like the capacitor, this device can be used for characterization, and in addition exhibits some important physics that will be used in discussion of the MOSFET. 6.1 THREE TERMINAL MOS (GATE-CONTROLLED DIODE) Modular Series: Advanced MOS, Figs. 2.8, 2.9 Geometry Diode (VD) adjacent to MOSC with overlapping gate (VG). Guard ring (VR) allows reverse bias around gate for isolation. 6.1.1 Gated Diode Basic Ideas VD = 0 same C-VG as the low-frequency MOSC because minority carriers are available from the gate to supply the interface with inversion charge. VD > 0 inversion layer charge flows to external circuit via diode. This is a non-equilibrium condition. VD > 0 inversion is harder to obtain (given value of QI requires higher VG) C-VG is shifted to higher VG VD < 0 C-VG shifted to lower VG since additional carriers are available. The shift in VG required for inversion indicates we should modify our definition of the surface potential at inversion, so we take 2 2F F DV Effect of VD on the inversion layer Consider the effect of VD on the inversion layer and on the surface potential under the gate. Assume a VG such that the surface is inverted, and then increase VD until inversion charge is removed and the surface under the gate goes into depletion near the diode. Until that point, the diode (and hence VD) is “connected” to the inversion layer. After inversion ceases, the surface potential is such that the semiconductor is in depletion, and the diode is no longer connected to the inversion layer. At that point, VD stops having an effect on the surface potential under the gate. This concept will be important in understanding saturation in a MOSFET. 6.1.2 Application to Semiconductor Characterization Examination of reverse-bias diode I-V characteristics allows extraction of minority carrier lifetime g under gate and under diode separately, and of surface recombination velocity so.2 Modular Series: Advanced MOS, Fig. 2.11 Analysis for VD = VD1 (such that diode is reverse-biased) and the increasing gate voltage: VG = VG1 Current is due to bulk generation under diode only. VG = VG2 Rapid increase in current due to surface recombination component under the gate. Slow rise due to bulk generation increase as w increases. VG = VG3 Surface recombination drops because inversion charge fills interface states, so current decreases (See Gscr discussion, Section 4.4.3.3: for psns > 0, Gscr decreases.) 6.2 ANALYSIS OF THREE-TERMINAL MOS Reference Tsividis, “Operation and Modeling of the MOSC”, McGraw Hill, 1987 We now derive a set of equations to characterize the 3-terminal MOS device, and which will be used in development of the MOSFET. 6.2.1 Inversion Charge We have that n n es iq kTS F( )/, as illustrated below. Define tkTq and note that iBtFnNln, BiNentF/. Then n N es BS F t( )/2 For the 3-terminal MOS, we make the substitution discussed above, where VD is the potential at the diode contact relative to the body. Then, 2 22F F Ds BVVn N eS F D t[ ( )]/ EFSiO2SiEiqs= 2qFqFw = wT3 6.2.2 Total Semiconductor Charge Recall that QS Si Swhich we have derived previously as QkTqLe e U e e US SiDU USU USF S F S[ ( ) ( )]/1 11 2 We change notation back to s , F , t, which we do by recalling UkTq and making use of itSiSiiSiDSinqkTnqqkTqLkT222 Then Q q n e e e eS Si t i s t S tF t S t F t S t2 1 11 2/ / / // We remove from [ ] a factor eF t/and note that n e Ni BF t/ and we can show that Q q N e e eS Si B t S t t S tS t F t S t221 2/ / // We will make use of this result later. In addition, we make an approximation valid in inversion. 6.2.3 Approximation for Inversion In inversion, we haveS F2. In addition, S F t,2, so we can simplify to… Q q N eS Si B S tVS F D t22( ) / where we have also taken account of the diode voltage VD. For bulk charge we have Q q NB Si B S2 We define4 2q NCSi Box in which case we can write Q CB ox S We will encounter the parameter several times in discussing the MOSFET. We can use these equations to find QI in terms of QS as follows. )(2/)2(SVtSBSiBSItDFSeNqQQQ Alternatively, we can make use of our results obtained from the depletion approximation, and write the inversion layer charge in terms of VG. Recall from Chapter 3 (Section 3.4.2) that wqNQCVBIoxSG1 (This expression was derived for deep depletion, but we can use it for equilibrium if QI is understood to be the equilibrium inversion charge.) If we solve this expression for QI, substitute the expression above for QB to replace qNBw, and subtract MS from the gate voltage to account for the contact potential, we arrive at )(sSMSGoxIVCQ We can write an expression for the gate voltage as well. tDFSVtSSMSoxSSMSGeCQV/)2( 6.3 MOSFET OPERATION We now take a look at the operation of the MOSFET. In this section we assume “long channel theory”; in other words, we ignore short channel effects ( for L < 2 m). We will modify the long channel theory later to account for these effects.5 6.3.1 MOSFET Basic Ideas Appropriate bias applied to gate results in conducting channel between source and drain. Uyemura, Figs. 1.7, 1.8, 1.9 For VD > VS, a current flows from drain to source. Also, an asymmetry exists in the channel, in that reverse bias depletion width between n+ drain and p-substrate increases. We expect an increase in ID vs VDS until “pinch-off” (inversion charge 0 at the drain); the corresponding drain voltage is VDsat. The region of operation for which VDS is larger than that required for pinch-off is called saturation. Uyemura Fig. 1.10 With increasing VGB we have increase in channel conductance increase in current. increase in VDsat due to increasingly large VDS required for pinch-off. 6.3.2 MOSFET Terminology p-Si substrate n-channel device n-Si substrate p-channel device normally ON for VGB = 0 depletion mode device normally OFF for VGB = 0 enhancement mode device 6.4 ID - VDS RELATIONSHIP: QUANTITATIVE ANALYSIS We derive the I-V characteristics using a standard electronics textbook approach first. This leads to two formulations: The Square Law and the Bulk Charge Law.6 In both derivations we assume: the geometry shown above, which ignores depletion regions around S and D; there is no contribution to ID from diffusion