Advanced MOS Devices Homework #4 Due Wednesday, March 30 Inversion and Bulk Charge The total charge (per unit area) in the semiconductor of a MOSC is given by Qs = -Si s, where s is the electric field evaluated at the surface. The charge in the inversion layer can be approximated by subtracting from Qs the charge in the depletion layer, which can be estimated using the depletion approximation. Using this scheme, calculate the inversion layer charge and the depletion layer charge for a p-substrate MOSC, and plot these together as a function of gate voltage in inversion. Do this using the results of the “exact” formalism developed in class for solving Poisson’s equation. Also, use a computer to generate the plot; do not do this by hand. Based on your plot, justify the assumption that for voltages in strong inversion, additional charge on the gate is balanced mostly by additional charge in the inversion layer, and that therefore the depletion depth maximizes. Charge Trapping in MOS Oxides Water incorporated into the oxide layer of a MOS capacitor will result in charge trapping during device operation if electrons pass through the oxide bulk. Suppose that water is diffused into an MOSC with an Al gate electrode (work function 4.1 eV), a p-type Si substrate with NB = 3 x 1017 cm-3, and an oxide thickness of 200 Å. a) Calculate the flat band voltage, the flat band capacitance, and the threshold voltage of the device ignoring the water diffusion, i.e., assuming there is no charge trapped anywhere in the oxide or at the Si-SiO2 interface. b) Suppose that water has diffused uniformly throughout the oxide at a density of NH2O = 2.5 x 1017 cm-3 and that each water-related site traps an electron during device operation. Calculate the threshold voltage shift due to electron trapping. Assume there are no interface states. c) Sketch qualitatively the high-frequency capacitance-voltage characteristics for the device both before and after the electron trapping of part b). d) Re-do part b) assuming that instead of being uniform, water is distributed exponentially into the oxide from the surface, i.e. (x) = Noexp[- x], where x = 0 is the metal/oxide surface, No = 2 x 1019 cm-3 and = 5 x 106 cm-1.CCD Maximum Electron Density (Taken from Modular Series, Advanced MOS Devices, prob. 3.1 p. 125 (see attached drawing). This problem expands on the simple example done in Section 5.2.2.1 Maximum Charge Due to Lateral Confinement. We recall an equation derived in Section 3.4.2.1 Surface Potential in Terms of VG: s GIoxo GIoxoVQCV VQCV1 1 212/ Note this is the same equation as used in Section 5.2.2.1 but solved for s. This formulation allows us to take into account non-idealities in VG, namely those due to work function difference and oxide charge Qf. If we include these effects, we have V VQCG G msfox where Qf is the oxide charge component and VG is the applied gate voltage (given in the problem as a graph of the clock voltages). Use the equation given above to calculate the surface potential under both the thick and the thin oxide regions of the gate, and for both 3 V and 12 V gate voltages (i.e., there will be four surface potentials to calculate). Make a sketch of the surface potential under both gates, and in both regions. Use this drawing to decide what the condition for maximum charge storage is, referring to the example done in the notes as a guide. Keep in mind that charge must flow in one direction, so the asymmetry of the gate must be