UH ECE 6347 - Chapter 10- CMOS, PSPICE, and Memory (23 pages)

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Chapter 10- CMOS, PSPICE, and Memory



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Chapter 10- CMOS, PSPICE, and Memory

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Lecture Notes


Pages:
23
School:
University of Houston
Course:
Ece 6347 - Advanced Topics in MOS Devices

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Advanced MOS Devices Chapter 10 CMOS PSPICE and Memory Cullen College of Engineering Department of Electrical and Computer Engineering Dr Len Trombetta CMOS CMOS Processing Retrograde Well We need heavy doping below the active area to avoid punch through to the substrate and lighter doping near the surface mobility issue threshold adjust So do ion implant and brief anneal n well Conventional process diffusion only p well Latch Up Problem Conducting path established from VSS to VDD Initiating Latch Up Spurious drop at output to VSS 0 7 V causes einjection into p tub from n drain Electrons collected at VDD and cause 0 7 V rise which injects holes from p source Holes collected at VSS and voltage drop reinforces electron injection from n drain Controlling Latch Up SOI Silicon on Insulator See Chapter 8 Use of epitaxial substrate e g p p for n well and n n for p well Using guard rings around FETs to divert minority carriers High dose high energy implants retrograde well to reduce BJT gain Sze VLSI Technology PSPICE Overview Level 1 Square Law model channel length modulation parameter l can be specified Level 2 Bulk Charge model if l is not specified a simple depletion approximation model is used to determine DL Level 3 Numerical approximations to the Bulk Charge model are made in an effort to improve computation time Level 3 is similar to Level 2 as far as channel length modulation Level 4 BSIM Terms with strong physical meaning are employed to model the fundamental physical effects while empirically derived parameters are judiciously used to embrace less well understood and generally subtle device characteristics Wolfe Section 5 5 Sample of PSPICE Parameters NSS NFS Surface State Density and Fast Surface State Density fixed charge Qf q and interface traps Qit q UCRIT UEXP Level 2 mobility degradation model THETA Level 3 mobility degradation model eff eff O Crit eff U exp O 1 VG VT LAMDA Channel length modulation GAMMA Body bias parameter called Bulk Threshold Parameter



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