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UCLA COMSCI M151B - HW4

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4.74.7.1 The instruction is: 101011 00011 00010 0000000000010100 opcode is 101011 rs is 00011 rt is 00010 instruction address is 0000000000010100 To sign extend the address, we have to add the most-significantbit which is 0, so the output is: 0000 0000 0000 0000 0000 0000 0001 0100 A jump instruction is 28 bits, and since we're only considering 26 bits, (32 bits minus 6 bits for the opcode), we have: 00 0110 0010 0000 0000 0001 0100 And so to shift left 2, we'll get 28 bits which is: 0001 1000 1000 0000 0000 0101 00004.7.2 The values of the ALU control unit's inputs are: The ALU will take the lower 6 bits: 010100 The main control will take take bits 31-26 which is: 1010114.7.3 The PC will have PC+4 as its new address. The path that will be taken: 1. The PC register's value is moved to the adder. The adder will add 4 to the PC value. Hence, the PC address will be PC+4 2. This value is moved to branch MUX 3. This value is moved to jump MUX 4. After the MUX, the value is moved back to PC.4.7.4 The opcode of the instruction is 101011 which is SW Since it is not a branch instruction, the branch address is PC+4. rt is 00010 so the write register input is 00010. The memory address for the SW instruction is calculated by adding rs and the instruction address The output of the MUX selects the sign-extended version of theinstruction so the decimal value is 20.Since it is a store instruction, it doesn't read anything fromthe data memory.4.7.5 ALU = -3 and 20 Add(PC+4) = PC and 4 Add(branch) = PC+4 and 20*44.7.6 Read register 1 input is 00011 Read register 2 input is 00010 Depending on the RegDst, the value will be 0 or 1 and will determine whether the write register input is 00010 or 00000 Since SW instruction will not write anything on the registers,the write register input is 0.1. blt instruction - I-format instruction We want to find out if rs is less than rt. One of the ways we can do this is by using the ALU to subtract rt from rs. One of the opcodes that the ALU has already derived is beq, which does subtraction for its ALU function. We want to use this subtractionto find out if rs is in fact less than rt. To do this, we set the ALUOp to be 01 so that it will do subtraction for its ALU function. The two inputs for the ALU will be rs and rt respectively. From here, once the ALU processes the inputs with the function, we get the ALU result. This result, however, does not consider for overflow. Hence, we use K-maps to determine whether there was an overflow or not. K-map MSB_rs MSB_rt MSB_result output 0 0 0 0 0 0 1 1 0 1 0 0 0 1 1 0 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 0 This output will be inverted, and sent to an AND gate, where the other input will be the blt control. And this will be connected to an OR gate where it will be connected to a multiplexer that determines the next value of the programcounter. Main Controller: Opcode: [New I-Type opcode] RegDst: X (not writing to register) ALUSrc: 0 (comparing rs and rt) MemtoReg: X (not writing to register) RegWrite: 0 (dont read from memory) MemWrite: 0 (dont branch on equal) ALUOp: 01 (Subtract for ALU function) blt: 12. jal instrunction - J-format instruction First, we have to figure out a way to get the new PC as being [31...28](PC+4)|[27...0](I<<2) rather than its usual options. To do this, we have to extract bits 0-25 from the instruction and shift this to the left by 2. And then, we merge this with bits 28-31 of PC+4. We have to add an additional multiplexor before the PC to select between the new jump value and will be controlled by the control signal jal (this is a new control signal). In addition to this, we must be able to select register r31 as the write register destination which will require a multiplexor before the write register port of the register file. With PC+4, we must be able to use it as our write data rather than the output of ALU and or the memory. This will require another multiplexor before the write data port of the register file. Main Controller: Opcode: [New J-type opcode] RegDst: X (overridden by new mux) ALUSrc: X (not using ALU) MemtoReg: X (overridden by new mux) RegWrite: 1 (write to register r31) MemRead: 0 (don't read from memory) MemWrite: 0 (don't write to memory) Branch: 0 (don't branch on equal) ALUOp: XX (not using ALU) jal: 13. jr instruction - R-format instruction Since this is a R-format instruction, the opcode is unchangeable and also the control is unchangeable. Therefore,there is no way to add another control signal that holds a 1 value for jr. So, in order to overcome this problem, we create a new ALU function 000001 which does a jr (000001 isn't used by anyother function). This will give the ALU control output of 1 and we can use this to choose the rs value instead of its typical PC options. This multiplexor will take inputs from the output of thebranch MUX for the other PC options and Read data 1 for the rs register. Another thing that we have to consider is that RegWrite has tobe 0 because we do not want to write to register. So to do this, we create a multiplexor that takes the input of ALU control ouptuas the selector. This will result in RegWrite being 0 whenever the "jr" function is invoked. Main Controller: Opcode: 000000 RegDst: 1 ALUSrc: 0 MemtoReg: 0 RegWrite: 1 MemRead: 0 MemWrite: 0 Branch: 0 ALUOp:


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