Datasheet for Lab#2: Introduction to Computer Aided Design(Schematic Capture & Test bench Waveform)Revised 1_25_10Section:Datasheet for Lab#2: Introduction to Computer Aided Design(Schematic Capture & Test bench Waveform)Revised 1_25_10I am submitting my own work, and I am aware of the penalties for cheating that may be assessed if I submit work that is not my own.___________________________ _____________Sign Name DatePrint Name:ID#: Section:For lab assistant use : I observed the student designing, implementing, and demonstrating the circuits and/or other work for this lab, or the student demonstrated adequate knowledge of their submitted work (otherwise, circle “no demo” and deduct points as appropriate).This lab was (circle one) circle ifOverall score (do not deduct late points):ON TIME LATE (-20%) NO DEMOLab assistant signature Date TimeProblem 1: Look at the list of control key shortcuts in the Appendix of the lab manual. Explain the functionality of the following. If you do not understand them, proceed to the project creation and answer these as you progress.1) CTRL M:2) CTRL D (Add Net Name Options) List the four Net Name choices. - - - -3) CTRL G (Add IO Markers Options) List the five options available with the Add IO Markers.4) CTRL W (CTRL W – Add Wire Options) List the two Add Wire Options- -5) CTRL P :6) CTRL B – (BusTap Options): Exercise #2 Submission Form 3 pagesLab #2 Submission FormPage 2Problem 2 : Using the Lab Manual directions, create a new project in the Xilinx ISE. Use the schematic capture tool to make a circuit for F(x,y,z) = xy + xz’ + x’yz1) Display a screenshot of schematic capture of the above function.2) Display a screenshot of test bench waveform of the above function.3) Write the corresponding truth table according to the test bench waveform. X Y Z F0 0 00 0 10 1 00 1 11 0 01 0 11 1 01 1 1Problem 3 : First display a screen shot of design summary, and answer the following questions based on design summary or screen shots in Problem 2.1) Write the name of your project:2) Give the full path of where the project is located:3) Write the name of your circuit source file (your schematic):4) What is the file extension associated with this type of file (e.g. ‘.doc’):5) You added a “user constraints file” to your project - write the name of the file 6) Write the file extension for this file 7) What does this file do?8) Open up this file using notepad or a non-formatting text editor and answer the following9) How many LEDs are mapped?10) How many switches are mapped?Lab #2 Submission FormPage 311) List the windows available from the Project Navigator (hint: Lab manual)12) What is synthesis? (hint: Press F1 on Xilinx ISE program)13) Adjust the windows in the project navigator to view the symbols. How many different AND Symbols exist in the Xilinx ISE? (Hint: type ‘and’ on Symbol Name Filter)14) What does AND3b1 mean?15) What is an I/O marker and how does it correspond to the constraints file?16) How many LUT(Lookup Table)s were needed to synthesize this design? (Hint: Look at Design