Contains material © Digilent, Inc Lab #4: Introduction to Computer Aided Design (Verilog Entry using Gate Level Primitives) Revised 2_07_11 Overview We have begun to utilize the BaSYS board. We have entered circuit data using schematic capture and found that to be ineffective for large circuits. Thus, we will now investigate entering function data using a hardware decription language. The language of choice for us is Verilog. Before beginning this module, you should… -Be familiar with reading and constructing basic logic circuits; -Understand logic equations, and how to implement a logic circuit from a logic equation; -Know how to operate Windows computers and Windows programs. After completing this module, you should… -Understand how basic CAD tools are used in basic circuit design; -Be able to enter functions using gate level primitives with Verilog. -Be able to simulate any logic circuit using the Xilinx internal simulator; -Be able to examine the output of a logic simulator to verify whether a given circuit has been designed correctly. This module requires: -A Windows PC -The Xilinx ISE software -A Digilent BaSYS board -KeyboardLab #4: Introduction to Verilog using Gate Level Primitives Contains material © Digilent, Inc. 2 The Design Process An idea for a new circuit design rarely proceeds directly from concept to flawless implementation. Rather, during the design phase, several potential circuits are considered, constructed, and evaluated. These prototype circuits are intended to give the designer greater insight into a circuit’s behaviors and characteristics before a final design is selected. These prototype circuits are intended to give the designer greater insight into a circuit’s behaviors and characteristics before a final design is selected. In the early days of digital design, prototype circuits were sketched on paper and then constructed from discrete components or simple integrated circuits (like the 7400 devices used in earlier labs). But over the last 30 years, the use of computer aided design (CAD) tools to specify and design digital circuits has made such methods obsolete. With the onset of the computer age, engineers learned they could be far more productive by designing a virtual circuit on a computer instead of actually building it. Design flow using CAD tool is shown on the following figure.Lab #4: Introduction to Verilog using Gate Level Primitives Contains material © Digilent, Inc. 3 Design capture CAD tools are useful throughout the engineering design process, and they benefit simple logic designs and complex system designs alike. In the early stages of a design, CAD tools allow designers to capture circuit definitions on a computer using any one of several different entry modes. 1. HDL Design: a “Hardware Definition Language” allows highly behavioral descriptions. - enable quick implementation - must be transformed to a structural representation before a circuit implementation since it contains no information about the structure of a circuit 2. Schematic: require highly structural designs. - yields a description that can be accurately simulated and directly implemented - all components and interconnections can take significant effort to create A class of computer programs called synthesizers can transform the behavioral description to gateway level circuits, thereby freeing design engineers to focus on other design tasks. (In the lab, ‘synthesize’ function in the Xilinx ISE does this job) Although synthesizers use rules and assumptions that allow for a wide range of behavioral definitions, several studies have shown that they are nevertheless able to produce structural descriptions that are better than most engineers can produce. HDL usually offers gate level primitive for low level circuit design. Test and Verify (or Circuit Simulation) Constructing circuits from discrete components can be somewhat time consuming, and often are of limited value in providing insight into circuit performance. Yet it is difficult to gain confidence in a circuit’s performance without actually testing and measuring its various characteristics. Simulators allow engineers to experiment with a circuit design, and challenge it with a wide array of inputs and operating assumptions before undertaking the job of actually building it. Further, complex circuits like modern microprocessors use far too many components to assemble into a prototype circuit – they simply could not have been built without the heavy use of simulators. Simulators need two kinds of input – a description of the virtual circuit that includes all of the gates (or other components) and interconnections, and stimulus input describing how the circuit’s inputs are to be driven over time. (In our lab, the test bench waveform in Xilinx ISE program enables this type of test) Implement and Test Once the simulation is correct and all design requirements have been confirmed, the design can be implemented and verified in hardware. This process involves the use of various meters, oscilloscopes, and other test and measurement equipment. The intent of the verification process is to ensure that the design still meets specification after it has actually been constructed in its target hardware. Several problems, such as slow operation, electronic noise, or excessive power consumption may be encountered for the first time after the circuit is actually constructed, which requires modification of the circuit design. As we experience in past lab, FPGA programming significantly reduce the actual circuit implementation and testing. Finally, most modern CAD tools have a top-level graphical interface called a framework from which all other required CAD tools can be launched. Such a framework is well illustrated in the Xilinx design tools used in this lab – all the steps that need to be taken from the beginning to the end of a design process are presented in outline form.Lab #4: Introduction to Verilog using Gate Level Primitives Contains material © Digilent, Inc. 4 Verilog Brief background The Verilog Hardware Description Language (HDL) is a language for describing the behavior and structure of electronic circuits, and is an IEEE standard (IEEE Std. 1364-1995). Verilog is used to simulate the functionality of digital electronic circuits at levels of abstraction ranging from stochastic and pure behavior down to gate