MSU ECE 3714 - Combinational Student ID Number Detector

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Datasheet forLab #5: Combinational Student ID Number DetectorRevised:2_19_11PreLab Data SheetDatasheet forLab #5: Combinational Student ID Number DetectorRevised:2_19_11Prelab DatasheetProblem 1. Make a truth table of your circuits Write your student id number as three groups: XXX – YY – ZZZZF1 is true for ____________ F2 is true for __________ F3 is true for _______________F4 is true for (all other numbers 0-9 not included above) _______________________Remember that since the decimal digits require 4-bits to represent them and only 10 digits are used, there are 6 don’t care rows of the truth table (rows 10-15). Fill in the truth table on the worksheet.Make KMaps for each of the functions. Design minimum SOP and POS equations for each of the functions F1-F4. Determine the relative cost for each of the functions comparing the SOP cost to the POS cost. Write the equation for F4 as a function of F1-F3. Use the kmap drawings on the next page. Write the final equations below.F1 = ________________________________________________F2 = __________________________________F3 = __________________________________F4 = __________________________________PreLab Data Sheet 1. Part I.. You MUST have the equations for F1, F2, F3, F4 done with K-MAPS ready for TA checkoff.. Sinceeach solution is unique, the TA can only check that you have made a good faith effort at getting a correct solution. You must have a minimized SOP form for F4. Also, show the TA the cost of each of your circuits showing whether SOP or POS has minimal relative cost.TA CHECKOFF (KMAPS and minimum equations) _______________________III. Design Implementation Design logic circuits using schematic capture or verilog with gate level primitives for each of the functions F1-F4. Map the inputs to the switches SW[3:0] and the outputs to LEDs LD[3:0]. Assign LD[3] = F1, LD[2] = F2, LD[1]=F3, and LD[0] = F4. This assigning of names is very similar to what was done in Lab4.Show the screen shots for each of the functions or the code and the corresponding module.IV. Testing Create a testbench to show that your design works. Show a screenshot of the testbench waveform and the simulation. Indicate whether or not it equals the truthtable.V. ImplementationImplement the design on your BaSYS development board and show that it works. Connect your design using SW(3), SW(2), SW(1), SW(0), LD(3) for F1 , LD(2) for F2, LD(1) for F3, and LD(0) for F4. Have the TA verify the operation of your circuit. TA Signoff ________________________Name: NetID:K-map Worksheet1. Truth TableA B C DDecimalConversionF1 F2 F3 F4Name:SOP (Sum of Product) form AB00 01 11 10CD00 01 11 10 F1 = AB00 01 11 10CD00 01 11 10 F2 = AB00 01 11 10CD00 01 11 10 F3 = AB00 01 11 10CD00 01 11 10 F4 =NetID:POS(Product of Sum) form AB00 01 11 10CD00 01 11 10 F1 = AB00 01 11 10CD00 01 11 10 F2 = AB00 01 11 10CD00 01 11 10 F3 = AB00 01 11 10CD00 01 11 10 F4


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