ColorGrayscaleEE 200 Spring 2014Lab 14.EE 200Design ToolsLaboratory 14Professor Jeffrey SchianoDepartment of Electrical Engineering1EE 200 Spring 2014Lab 14.Laboratory 14 Topics• Hardware Realization using a Microcontroller– Microcontroller/Programmer Interface – Integrated Development Environment: MPLAB IDE X• Exercises:– Creating an MPLAB C Project– Working with Digital I/O Ports2EE 200 Spring 2014Lab 14.References for Lab 14• data_sheet_dsPIC33EP64MC502.pdf• sec_10_IO_ports.pdf• PICkit_3_User_Guide.pdf• LM2937.pdf3EE 200 Spring 2014Lab 14.Digital I/O Ports: Overview4• Two Digital Input/Output ports: PORTx, x = A or B• PORTA provides 5 I/O lines: RA0 through RA4• PORTB provides 16 I/O lines: RB0 through RB15• Input: 3.3V CMOS • Output: 3.3V CMOS or open-drain– Open drain allows VDD up to 5V on 5V tolerant pinsEE 200 Spring 2014Lab 14.Digital I/O Ports: Pin Locations5AN0/OA2OUT/RA0AN1/C2IN1+/RA1MCLRPGED3/VREF-/AN2/C2IN1-/SS1/ RPI32/CTED2/RB0PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1PGEC1/AN4/C1IN1+/RPI34/RB2PGED1/AN5/C1IN1-/RP35/RB3VSSOSC1/CLKI/RA2OSC2/CLKO/RA3FLT32/RP36/RB4CVREF20/RP20/T1CK/RA4VDDPGED2/ASDA2/RP37/RB5AVDDAVSSRPI47/PWM1L/T5CK/RB15RPI46/PWM1H/T3CK/RB14RPI45/PWM2L/CTPLS/RB13RPI44/PWM2H/RB12TDI/RP43/PWM3L/RB11TDO/RP42/PWM3H/RB10VCAPVSSTMS/ASDA1/SDI1/RP41/RB9TCK/CVREF10/ASCL1/SDO1/RP40/T4CK/RB8SCK1/RP39/INT0/RB7PGEC2/ASCL2/RP38/RB6 Pins are up to 5V tolerant12345678910111213142827262524232221201918171615dsPIC33EP64MC502-I/SPEE 200 Spring 2014Lab 14.Digital I/O Ports: Block Diagram6EE 200 Spring 2014Lab 14.I/O Port Control Registers7• ANSELx: Analog Select Control Register• TRISx: Data Direction Register• PORTx: I/O Port register• LATx: I/O Latch register• ODCx: Open-Drain Control RegisterEE 200 Spring 2014Lab 14.DIO Programming Example 1• Read the digital logic-level at PORTA RA0 (pin 2), and write its value to PORTA RA1 (pin 3)8330RA012345678910111213142827262524232221201918171615dsPIC33EP64MC502-I/SP27kΩDDV =3.3VRA1EE 200 Spring 2014Lab 14.DIO Programming Example 1• Read the digital signal present at RA0 (pin 2), and output this signal to RA1 (pin 3)9EE 200 Spring 2014Lab 14.Microcontroller Interface: Circuit10LM2937-3.3VOUT = 3.3 V6-pin Header for PICkit 312345678910111213142827262524232221201918171615dsPIC33EP64MC502-I/SPDDAV0.1μFSSAVSSV4.7kΩ0.1μFDDVMCLRPGED2 PGEC21PPMCLR / VDDVSSVPGDPGC68μFTant10μF16V0.1μFVIN = 5.0 VSSVCAPVEE 200 Spring 2014Lab 14.Microcontroller Circuit11EE 200 Spring 2014Lab 14.PICkit-3 Programmer12EE 200 Spring 2014Lab 14.MPLAB X Integrated Development Environment• Integrated toolset for developing embedded applications on the Microchip Technology PIC and dsPIC microcontrollers• MPLAB IDE allows a user to– Create a project for a target microcontroller– Simulate application with MPLAB®SIM Simulator– Debug application on development board– Generate a stand-alone application13EE 200 Spring 2014Lab 14.Start MPLAB X IDE• Open the Microchip folder under All Programs • Open the MPLAB IDE X and select MPLAB IDE X v2.0014EE 200 Spring 2014Lab 14.Create a New Project15• Six Step Process1. Choose Project2. Select Device3. Select Header (no header for our device)4. Select Tool5. Select Compiler6. Select Project Name and FolderEE 200 Spring 2014Lab 14.Exercise 1: Create a New Project1612EE 200 Spring 2014Lab 14.Exercise 11745EE 200 Spring 2014Lab 14.Exercise 1186• Do not use blank spaces in either file or folder names• A warning appears if the path length is too longEE 200 Spring 2014Lab 14.Exercise 119EE 200 Spring 2014Lab 14.Create a C File20EE 200 Spring 2014Lab 14.Exercise 1 Code21EE 200 Spring 2014Lab 14.Code Development Flow22EE 200 Spring 2014Lab 14.Make and Deploy the Code23EE 200 Spring 2014Lab 14.MPLAB IDE Output24EE 200 Spring 2014Lab 14.Time Delay Methods• Suppose we want to flash the LED on and off at a specified rate• How do we introduce time delays?• Consider two approaches– Simple For Loop– Library Functions• __delay32, __delay_ms(), __delay_us() 25EE 200 Spring 2014Lab 14.What Determines Execution Time?• Clock frequency determines execution rate• Six options for generating the clock signal• Microcontroller starts using the internal fast RC oscillator• Default clock frequencies– System clock frequency: FOSC = 7.37 MHz– Instruction cycle clock frequency: FCY – FCY = FOSC/2 = 3.685 MHz26EE 200 Spring 2014Lab 14.Delay Functions• __delay32(unsigned long num_cycles)–wait num_cycles clock periods• __delay_ms(unsigned long num_ms)–wait num_ms milliseconds• __delay_us(unsigned long num_ms)–wait num_us microseconds27EE 200 Spring 2014Lab 14.Procedure for Using Delay Functions• To use either __delay_ms() or __delay_us(), define the value of the instruction cycle clock frequency (FCY) as an unsigned long• Include the header file libpic30.h, after defining FCY• Call the delay function28EE 200 Spring 2014Lab 14.DIO Programming Exercise 2• Flash an Led connected to pin 3 (RA1) at 2 Hz using the delay function __delay_ms()29EE 200 Spring 2014Lab 14.EE 200Design ToolsLaboratory 14Professor Jeffrey SchianoDepartment of Electrical Engineering1EE 200 Spring 2014Lab 14.Laboratory 14 Topics• Hardware Realization using a Microcontroller– Microcontroller/Programmer Interface – Integrated Development Environment: MPLAB IDE X• Exercises:– Creating an MPLAB C Project– Working with Digital I/O Ports2EE 200 Spring 2014Lab 14.References for Lab 14• data_sheet_dsPIC33EP64MC502.pdf• sec_10_IO_ports.pdf• PICkit_3_User_Guide.pdf• LM2937.pdf3EE 200 Spring 2014Lab 14.Digital I/O Ports: Overview4• Two Digital Input/Output ports: PORTx, x = A or B• PORTA provides 5 I/O lines: RA0 through RA4• PORTB provides 16 I/O lines: RB0 through RB15• Input: 3.3V CMOS • Output: 3.3V CMOS or open-drain– Open drain allows VDD up to 5V on 5V tolerant pinsEE 200 Spring 2014Lab 14.Digital I/O Ports: Pin Locations5EE 200 Spring 2014Lab 14.Digital I/O Ports: Block Diagram6EE 200 Spring 2014Lab 14.I/O Port Control Registers7• ANSELx: Analog Select Control Register• TRISx: Data Direction Register• PORTx: I/O Port register• LATx: I/O Latch register• ODCx: Open-Drain Control RegisterEE 200 Spring 2014Lab 14.DIO Programming Example 1• Read the digital logic-level at PORTA RA0 (pin 2), and write its value to PORTA RA1 (pin 3)8EE 200 Spring 2014Lab 14.DIO Programming Example 1• Read the digital signal present at RA0 (pin