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PSU EE 200 - Lab_12_EE200_s14

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ColorUntitledEE 200 Spring 2014Lab 12.EE 200Design ToolsLaboratory 12Professor Jeffrey SchianoDepartment of Electrical Engineering1EE 200 Spring 2014Lab 12.Laboratory 12 Topics• Hardware realization using printed circuit boards – Export Gerber files for manufacturing– Ultiboard Design Setup Tools• LabVIEW– Customized Controls2EE 200 Spring 2014Lab 12.Export• File >> Export• Ultiboard exports many types of files• Configure each export option with the Propertiesbutton• Once configuration is done, click Export to generate output file3EE 200 Spring 2014Lab 12.Gerber• The Gerber format is the industry standard file format to describe the images of a PCB (copper layers, solder mask, drill holes, etc.)• The RS-274X Gerber format, also known as extended Gerber or X-Gerber, is a 2D bi-level vector image description format• The RS-274X Gerber format is human readable ASCII format4EE 200 Spring 2014Lab 12.Gerber• You can configure the following properties: – Single file per layer– Merge layers and create a composite file (multiple layers)– Negative image– Reflection image– Oversize solder mask• You must contact the production house and identify all the files and formatting information they need to support their manufacturing process5EE 200 Spring 2014Lab 12.Gerber6EE 200 Spring 2014Lab 12.Gerber Viewer• Ultiboard includes a built-in Gerber Viewer• Review Gerber files before sending to manufacturing• Use Design Toolbox to hide/unhide layers• Every Gerber file opened is a separate layer• Fill >> Open 7EE 200 Spring 2014Lab 12.NC (Numeric Control) Drill File• Creates a drill file (.drl) and report file (.rep)• Configure units and precision• Drill file is a gerber file with drill centers• Report file indicates the size of each drill8EE 200 Spring 2014Lab 12.Other Files9• Parts Centroids– Used for parts placement– Information can be used in CNC and parts-insertion machines• Bill of Materials– BOM helpful for manufacturing and planningEE 200 Spring 2014Lab 12.Print • File >> Print• Useful for:– Documenting– Printer-based PCB processes– Creating negative images and reflections10EE 200 Spring 2014Lab 12.Exercise 1• Open parity_detector.ewprj in the Exercise 1 directory• Generate the following files for the parity detector– Gerber RS274X (use export properties on Lab 12.12)– NC Drill–BOM• List of output files appears on Lab 12.13• Open the Gerber files using Ultiboard11EE 200 Spring 2014Lab 12.Exercise 112• Gerber export propertiesEE 200 Spring 2014Lab 12.Exercise 113• Export File ListingEE 200 Spring 2014Lab 12.Ultiboard Design Setup Tools• Netlist Editor• Forward and Backward Annotation• Pin and Gate Swap• Trace Settings and Clearances• Renumber RefDes14EE 200 Spring 2014Lab 12.Netlist Editor• Ultiboard Tools >> Netlist Editor• Net-related tasks– Add/Remove/Rename– Set routing layers for each net– Modify Pin assignments15Net 1EE 200 Spring 2014Lab 12.Exercise 2• Open parity_detector.ewprj in the Exercise 2 directory– Display Net 1 connections using the Netlist Editor• Open parity_detector.ms12 in the Exercise 2 directory– Display the footprint pins on U1A through U1D• Right-click U1x >> Properties >> Display >> Show footprint names– Display Net 1 connections by clicking on Net 1 in the Spreadsheet View• Why are Net 1 connections different in Ultiboard and Multisim?16EE 200 Spring 2014Lab 12.Forward and Backward Annotation• Keeps Schematic and PCB Layout synchronized• Forward Annotation: Multisim to Ultiboard• Backward Annotation: Ultiboard to Multisim• Forward Annotation is always recommended– All actions are supported• Backward annotation has limitations17EE 200 Spring 2014Lab 12.Forward Annotation• Multisim to Ultiboard• Transfer >> Forward Annotate to Ultiboard >> Forward Annotate to Ultiboard 12• Creates a new netlist, Ultiboard applies only what is different from the current layout18EE 200 Spring 2014Lab 12.Backward Annotation• Ultiboard to Multisim• Transfer >> Backward annotate to Multisim >> Backward annotate to Multisim 12• What can be annotated backwards– Change in Reference ID– New Name for a net– A deleted footprint– A changed footprint19EE 200 Spring 2014Lab 12.Backward Annotation: Limitations• The following changes do not back annotate– Components added to the design– A modified net connection between components– A pin and/or gate swap• Forward Annotation is always recommended– All actions are supported20EE 200 Spring 2014Lab 12.Pin and Gate Swap• Enables user to swap pins or gates from specific ICs• Pin and Gate Swap must first be enabled in Multisim before transferring the design to Ultiboard• Enabled in (Multisim) Spreadsheet View >> Components tab– Pin Swap and Gate Swap columns21EE 200 Spring 2014Lab 12.Trace Settings• Change trace widths before routing• Use Spreadsheet View (instead of the Netlist Editor)• Use <Shift> or <Ctrl> for multiple selection• Trace Width column22EE 200 Spring 2014Lab 12.Clearance Setup• Change clearances before routing• Useful for Design Rules Check (DRC)• View >> Clearances• Trace Clearance column in the Spreadsheet View23EE 200 Spring 2014Lab 12.Renumber Parts (RefDes)• Tool >> Renumber Parts• Easier to locate parts• Organized in a logical direction– left-to-right, top-to-bottom24EE 200 Spring 2014Lab 12.Exercise 3• Open parity_detector.ewprj in the Exercise 3 directory• Follow along with the instructor on slides 26 through 31 as they demonstrate– Part Renumbering – Backward annotating to Multisim25EE 200 Spring 2014Lab 12.Exercise 3: Renumber Parts• Select Tools >> Renumber parts…26EE 200 Spring 2014Lab 12.Exercise 3: Renumber PartsBefore27AfterEE 200 Spring 2014Lab 12.Exercise 3: Backward Annotate28• Select Transfer >> Backward annotate to Multisim >> Backward Annotate to Multsim 12.0• Save the .ewnet file to the Exercise 3 directory• Backward annotate to the file parity_detector.ms12 in the Exercise 3 directoryEE 200 Spring 2014Lab 12.Exercise 3: Backward Annotate29• As Multisim does not have a SMT footprint for the quad NAND gate integrated circuit, ignore this change for U1 and U2EE 200 Spring 2014Lab 12.Exercise 330• Observe that backward annotation does not account for the pin swapEE 200 Spring 2014Lab 12.Exercise 331BeforeAfterEE 200 Spring 2014Lab 12.Customized Controls• Three types – Control– Type


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