EE100Su08 Lecture 15 July 30th 2008 Outline MultiSim Step 1 Download program from 257 5 MB http ftp ni com support softlib Circuit Design Suite 10 0 10 0 1 NI CDS 10 0 1 Stu exe Step 2 Use license key given out in class Project labs START NEXT WEEK see updated schedule online tonight For this week make sure you finish Strain Gauge QUESTIONS Diodes Wrap up Reading Chapter 2 from your reader Diode Circuits EE100 Summer 2008 Slide 1 Bharathwaj Muthuswamy Diode Physical Behavior and Equation Schematic Device N P type type Symbol I I V V Qualitative I V characteristics I V positive easy conduction Quantitative I V characteristics I I 0 e qV kT 1 In which kT q is 0 026V and IO is a constant depending on diode area Typical values 10 12 to 10 16 A Interestingly the graph of this equation looks just like the figure to the left V V negative no conduction A non ideality factor n times kT q is often included EE100 Summer 2008 Slide 2 Bharathwaj Muthuswamy Diode Ideal Perfect Rectifier Model qV The equation I I 0 exp kT 1 is graphed below for I 0 10 15 Simple Perfect Rectifier Model A If we can ignore the small forwardbias voltage drop of a diode a simple effective model is the perfect rectifier whose I V characteristic is given below 10 Current in mA 8 6 4 2 Forward Voltage in V 0 5 0 5 I 10 The characteristic is described as a rectifier that is a device that permits current to pass in only one direction The hydraulic analog is a check value Hence the symbol I EE100 Summer 2008 V Slide 3 Reverse bias I 0 any V 0 Forward bias V 0 any I 0 V A perfect rectifier Bharathwaj Muthuswamy I V Characteristics I In forward bias on p side we have almost unlimited flow very low resistance Qualitatively the I V characteristics must look like current increases rapidly with V VF I In reverse bias on n side almost no current can flow Qualitatively the I V characteristics must look like The current is close to zero for any negative bias EE100 Summer 2008 Slide 4 VF Bharathwaj Muthuswamy pn Junction Reverse Breakdown As the reverse bias voltage increases the peak electric field in the depletion region increases When the electric field exceeds a critical value Ecrit 2x105 V cm the reverse current shows a dramatic increase reverse leakage current ID A forward current breakdown voltage EE100 Summer 2008 VBD VD V Slide 5 Bharathwaj Muthuswamy The pn Junction I vs V Equation I V characteristic of PN junctions In EECS 105 130 and other courses you will learn why the I vs V relationship for PN junctions is of the form I I 0 e qV kT 1 where I0 is a constant proportional to junction area and depending 19 on doping in P and N regions q electronic charge 1 6 10 k is Boltzman constant and T is absolute temperature 12 10 15 A KT q 0 026V at300 K a typical value for I is 10 0 We note that in forward bias I increases exponentially and is in the A mA range for voltages typically in the range of 0 6 0 8V In reverse bias the current is essentially zero EE100 Summer 2008 Slide 6 Bharathwaj Muthuswamy Ideal Diode Model of PN Diode Circuit symbol ID I V characteristic ID A VD Switch model ID VD forward bias reverse bias VD V An ideal diode passes current only in one direction An ideal diode has the following properties when ID 0 VD 0 when VD 0 ID 0 EE100 Summer 2008 Diode behaves like a switch closed in forward bias mode open in reverse bias mode Slide 7 Bharathwaj Muthuswamy C u rre n t m ic ro a m p Diode Large Signal Model 0 7 V Drop 0 7 400 I 300 200 100 V 0 5 3 1 forward bias V 1 The Large Signal Diode Model I Improved Large Signal Diode Model If we choose not to ignore the small Forward bias Reverse bias forward bias voltage drop of a I 0 any V 0 V 0 7 any I 0 diode it is a very good V approximation to regard the voltage 0 7 drop in forward bias as a constant about 0 7V the Large signal model results EE100 Summer 2008 Slide 8 Bharathwaj Muthuswamy Large Signal Diode Model Circuit symbol ID I V characteristic ID A VD Switch model ID forward bias reverse bias VDon VD V VDon VD For a Si pn diode VDon 0 7 V RULE 1 When ID 0 VD VDon RULE 2 When VD VDon ID 0 EE100 Summer 2008 Slide 9 Diode behaves like a voltage source in series with a switch closed in forward bias mode open in reverse bias mode Bharathwaj Muthuswamy How to Analyze Circuits with Diodes A diode has only two states forward biased ID 0 VD 0 V reverse biased ID 0 VD 0 V or 0 7 V Procedure 1 Guess the state s of the diode s 2 Check to see if KCL and KVL are obeyed 3 If KCL and KVL are not obeyed refine your guess 4 Repeat steps 1 3 until KCL and KVL are obeyed Example vs t EE100 Summer 2008 vR t If vs t 0 V diode is forward biased else KVL is disobeyed try it If vs t 0 V diode is reverse biased else KVL is disobeyed try it Slide 10 Bharathwaj Muthuswamy EE100 Summer 2008 Slide 11 Bharathwaj Muthuswamy Rectifier Circuit Assume the ideal perfect rectifier model VS t VS t VR t t VR t rectified version of input waveform t EE100 Summer 2008 Slide 12 Bharathwaj Muthuswamy Full Wave Rectifier AC DC converter EE100 Summer 2008 Slide 13 Bharathwaj Muthuswamy Full Wave Rectifier AC DC converter EE100 Summer 2008 Slide 14 Bharathwaj Muthuswamy Full Wave Rectifier AC DC converter EE100 Summer 2008 Slide 15 Bharathwaj Muthuswamy Another Example Circuit EE100 Summer 2008 Slide 16 Bharathwaj Muthuswamy Another Example Circuit EE100 Summer 2008 Slide 17 Bharathwaj Muthuswamy Peak Detector Circuit Assume the ideal perfect rectifier model Vi t Vi t C Vi VC t t Key Point The capacitor charges due to one way current behavior of the diode EE100 Summer 2008 VC t Slide 18 VC Bharathwaj Muthuswamy Peak Detector Circuit Assume the ideal perfect rectifier model Vi t C VC t Key Point The capacitor charges due to one way current behavior of the diode EE100 Summer 2008 Slide 19 Bharathwaj Muthuswamy Load Line Analysis Method 1 Graph the I V relationships for the non linear element and for the rest of the circuit 2 The operating point of the circuit is found from the intersection of these two curves I RTh I VTh VTh RTh operating point V V VTh The I V characteristic of all of the circuit except the non linear element is called the load line EE100 Summer 2008 Slide 20 Bharathwaj Muthuswamy Load Line Analysis Method …
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