Slide 1EE100 Summer 2008 Bharathwaj MuthuswamyEE100Su08 Lecture #9 (July 16th2008)• Outline– HW #1s and Midterm #1 returned today• Midterm #1 notes• HW #1 and Midterm #1 regrade deadline: Wednesday, July 23rd2008, 5:00 pm PST. Procedure:– HW #1: Bart’s office hours– Midterm #1: Attach a note to the FRONT of your test with your complaint and drop it in HW box– Questions?– This week: Operational Amplifiers (Op-Amps)• Op-Amp Model• Negative Feedback for Stability• Components around Op-Amp define the Circuit Function• Nonlinear circuits• Op-Amp from 2-Port BlocksSlide 2EE100 Summer 2008 Bharathwaj MuthuswamyThe Operational Amplifier• The operational amplifier (“op amp”) is a basic building block used in analog circuits.– Its behavior is modeled using a dependent source.– When combined with resistors, capacitors, and inductors, it can perform various useful functions:• amplification/scaling of an input signal• sign changing (inversion) of an input signal• addition of multiple input signals• subtraction of one input signal from another• integration (over time) of an input signal• differentiation (with respect to time) of an input signal• analog filtering• nonlinear functions like exponential, log, sqrt, etc– Isolate input from output; allow cascadingSlide 3EE100 Summer 2008 Bharathwaj MuthuswamyOp Amp Terminals• 3 signal terminals: 2 inputs and 1 output• IC op amps have 2 additional terminals for DC power supplies• Common-mode signal= (v1+v2)/2• Differential signal = v1-v2-+V +V –Inverting input v2Non-inverting input v1positive power supplynegative power supplyv0outputSlide 4EE100 Summer 2008 Bharathwaj MuthuswamyOp Amp “Notation” and ModelSlide 5EE100 Summer 2008 Bharathwaj MuthuswamyOp Amp “Notation” and ModelSlide 6EE100 Summer 2008 Bharathwaj MuthuswamyOp Amp “Notation” and ModelSlide 7EE100 Summer 2008 Bharathwaj MuthuswamyOp Amp “Notation” and ModelSlide 8EE100 Summer 2008 Bharathwaj MuthuswamyOp Amp “Notation” and ModelSlide 9EE100 Summer 2008 Bharathwaj MuthuswamyOp Amp “Notation” and ModelSlide 10EE100 Summer 2008 Bharathwaj MuthuswamyOp Amp “Notation” and ModelSlide 11EE100 Summer 2008 Bharathwaj MuthuswamySlide 12EE100 Summer 2008 Bharathwaj MuthuswamySlide 13EE100 Summer 2008 Bharathwaj MuthuswamySlide 14EE100 Summer 2008 Bharathwaj MuthuswamySlide 15EE100 Summer 2008 Bharathwaj MuthuswamySlide 16EE100 Summer 2008 Bharathwaj MuthuswamySumming-Point Constraint• Check if under negative feedback–Small viresult in large vo–Output vois connected to the inverting input to reduce vi– Resulting in vi=0• Summing-point constraint–v1= v2–i1 = i2 =0• Virtual short circuit– Not only voltage drop is 0 (which is short circuit), input current is 0– This is different from short circuit, hence called “virtual” short circuit.Slide 17EE100 Summer 2008 Bharathwaj MuthuswamyIdeal Op-Amp Analysis TechniqueAssumption 1: The potential between the op-amp input terminals, v(+)–v(-), equals zero.R2R1−+V0VINEXAMPLEAssumption 2: The currents flowing into the op-amp’s two input terminals both equal zero.No Potential DifferenceNo CurrentsSlide 18EE100 Summer 2008 Bharathwaj MuthuswamyIdeal Op-Analysis: Non-Inverting AmplifierAssumption 1: The potential between the op-amp input terminals, v(+)–v(-), equals zero.R2R1−+V0VINEXAMPLEAssumption 2: The currents flowing into the op-amp’s two input terminals both equal zero.021=−+RvvRvoutinininoutvRRRv121+=KCL with currents in only two branchesNon-inverting AmplifierVINappears hereSlide 19EE100 Summer 2008 Bharathwaj MuthuswamyNon-Inverting Amplifier• Ideal voltage amplifier_+vin+-R2R1RLv2v012 1202221121,02.()(0)()ovininoininvClosed loop gain AvvvviiUse KCL At NodevvviRRvRRAvRvInput impedancei==== ==−−==+===→∞2Slide 20EE100 Summer 2008 Bharathwaj MuthuswamyIdeal Op-Amp Analysis: Inverting AmplifierR2I2VOUT-VRR1RLVIN021=−+−RVVRVVOUTRINR()RinROUTVVRRVV −−=12Voltage is VROnly two currents for KCLInverting Amplifier with reference voltageSlide 21EE100 Summer 2008 Bharathwaj MuthuswamyInverting Amplifier• Negative feedback Æchecked• Use summing-point constraint12 1222122110, 02.()( )ovinin outooinvClosed loop gain Avvv iiUse KCL At Nodevv v viRRRvvRvInput impedance Ri==== ==−−===−==Ideal voltage source – independent of load resistor_+vin+-R2R1RLv1v0v2i2Slide 22EE100 Summer 2008 Bharathwaj MuthuswamyVoltage Follower_+vin+-RLv2v0210222112 2110()(0)()11oinRRvvviRRvRR RAvR R=→∞−−==+== =+=Slide 23EE100 Summer 2008 Bharathwaj MuthuswamySlide 24EE100 Summer 2008 Bharathwaj MuthuswamySlide 25EE100 Summer 2008 Bharathwaj MuthuswamySlide 26EE100 Summer 2008 Bharathwaj MuthuswamySlide 27EE100 Summer 2008 Bharathwaj MuthuswamySlide 28EE100 Summer 2008 Bharathwaj MuthuswamySlide 29EE100 Summer 2008 Bharathwaj MuthuswamySumming Amplifier_+v3+-v0R1R2+-+-R3R0v2v1Slide 30EE100 Summer 2008 Bharathwaj MuthuswamyDifference Amplifier_+v2+-v0R4R1+-R3R2v1Slide 31EE100 Summer 2008 Bharathwaj MuthuswamyIntegrator•Want• What is the difference between:oinvKvdt=∫R+-CV0+-vinSlide 32EE100 Summer 2008 Bharathwaj MuthuswamyDifferentiator•Want _+vin+-Rv0CSlide 33EE100 Summer 2008 Bharathwaj MuthuswamyNonlinear Opamp Circuits• Start reading through online notes: “Introduction to nonlinear circuit analysis”. • Outline:– Differences between positive and negative feedback.– Oscillator circuit.Slide 34EE100 Summer 2008 Bharathwaj MuthuswamyHigh Quality Dependent Source In an AmplifierV0depends only on input (V+− V-) )VV(AV0−+−=+−AV+V−V0Differential AmplifierAMPLIFIER SYMBOL+−+−V0AV1+−V1RiCircuit Model in linear regionAMPLIFIER MODELSee the utility of this: this Model when used correctly mimics the behavior of an amplifier but omits the complication of the many many transistors and other components.Slide 35EE100 Summer 2008 Bharathwaj MuthuswamyModel for Internal Operation• A is differential gain or open loop gain• Ideal op amp– Common mode gain = 00ioARR→∞→∞=v1v2Ri+–RovoA(v1–v2)i1i2io+_• Circuit Model()121212,2(),0cm docmcmddocmvvvvvvvAv AvSince v A v v A+==−=+=− =Slide 36EE100 Summer 2008 Bharathwaj MuthuswamyModel and Feedback• Negative feedback– connecting the output port to the negative input (port 2)• Positive feedback– connecting the output port to the positive input (port 1)• Input impedance: R looking into the input terminals• Output impedance:
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