Slide 1Slide 2TIMING DIAGRAMSWHAT IS THE ORIGIN OF GATE DELAY?VOLTAGE WAVEFORMS (TIME FUNCTIONS)GATE DELAY (PROPAGATION DELAY)ExampleSlide 8EFFECT OF PROPAGATION DELAY ON PROCESSOR SPEEDSlide 10Slide 11Slide 12Slide 13Slide 14Slide 15Slide 16Slide 17Slide 18Slide 19Slide 20Slide 21Slide 22Slide 23Slide 24Slide 25Slide 26Slide 27Slide 28Slide 29Slide 30Slide 31Slide 32Slide 33Slide 34Slide 35Slide 36Week 14a, Fall 2005 EE42/100, Prof. White 1Week 14a: Micro- and Nanotechnology1. Some preliminaries:a. End of the propagation delay storyb. “Silicon Run” (video) CMOS discussion – if timec. (Just for fun: “Hop On Board” -- Microlab safety video) – if timed. Energy Band View of Semiconductors if time -- shortened version of notes handed out earliere. Some electronic application examples – if time2. Micro- and Nanotechnology introduction1. The sizes of things2. Some micromachines3. A bit about nanotech3. What about radio?Week 14a, Fall 2005 EE42/100, Prof. White 21a. Propagation delay in logic circuitsWeek 14a, Fall 2005 EE42/100, Prof. White 3C,B,AD)BA( )(__CBBDtttttLogic stateDDD2D2D03DDTIMING DIAGRAMSShow transitions of variables vs timeABCNote that becomes valid two gate delays after B&C switch, because the invert function takes one delay and the NAND function a second.)(__CBNo change at t = 3 DNote becomes valid one gate delay after B switchesBWeek 14a, Fall 2005 EE42/100, Prof. White 4WHAT IS THE ORIGIN OF GATE DELAY?Logic gates are electronic circuits that process electrical signalsMost common signal for logic variable: voltageNote that the specific voltage range for 0 or 1 depends on “logic family,” and in general decreases with logic generationsSpecific voltage ranges correspond to “0” or “1”Thus delay in voltage rise or fall (because of delay in charging internal capacitances) will translate to a delay in signal timing3210VoltsRange “0”Range “1”“Gray area” . . . not allowedWeek 14a, Fall 2005 EE42/100, Prof. White 5VOLTAGE WAVEFORMS (TIME FUNCTIONS)Inverter input is vIN(t), output is vOUT(t)inside a large system)t(vIN)t(vOUTtVin(t)Week 14a, Fall 2005 EE42/100, Prof. White 6ApproximationDGATE DELAY (PROPAGATION DELAY)Define as the delay required for the output voltage to reach 50% of its final value. In this example we will use 3V logic, so halfway point is 1.5V.Inverters are designed so that the gate delay is symmetrical (rise and fall)Vin(t)t1.5Vout(t)t1.5DDWeek 14a, Fall 2005 EE42/100, Prof. White 7ExampleThe gate delay is simply the charging of the capacitors at internal nodes.Oversimplified example using “ideal inverter, II” and 5V logic swing)t(vOUT)t(vIN2.55)t(vIN)t(vOUT RC = 0.1ns so 0.069ns after vIN switches by 5V, Vx moves 2.5VtvIN2.55VxD = 0.069nsvOUT)t(vIN)t(vOUTIIRCVx RC = 0.1ns MODELWHAT DETERMINES GATE DELAY?Week 14a, Fall 2005 EE42/100, Prof. White 8Controlled Switch Model of InverterSo if VIN is 2V then SN is closed and SP is open. Hence VOUT is zero.InputOutputRN-+SP is closed if VIN < VDDRP-++-+-VDD = 2VVSS = 0VSNSPSN is closed if VIN > VSSVINVOUTBut if VIN is 0V then SP is closed and SN is open. Hence VOUT is 2V.Week 14a, Fall 2005 EE42/100, Prof. White 9EFFECT OF PROPAGATION DELAY ON PROCESSOR SPEEDComputer architects would like each system clock cycle to have between 20 and 50 gate delays … use 35 for calculationsImplication: if clock frequency = 500 MHz clock period = (5108 s1)1Period = 2 10 9s = 2 ns (nanoseconds)Gate delay must be D = (1/35) Period = (2 ns)/35 = 57 ps (picoseconds) How fast is this? Speed of light: c = 3 108 m/sDistance traveled in 57 ps is:C X D = (3x108m/s)(57x10-12) = 17 x 10-4 m = 1.7cmWeek 14a, Fall 2005 EE42/100, Prof. White 101d. Energy Band View of SemiconductorsConductors, semiconductors, insulators: Why is it that when individual atoms get close together to form a solid – such as copper, silicon, or quartz – they form materials that have a high, variable, or low ability to conduct current?Understand in terms of allowed, empty, and occupied electronic energy levels and electronic energy bands.Fig. 1 shows the calculated allowed energy levels for electrons (vertical axis) versus distance between atoms (horizontal axis) for materials like silicon.Week 14a, Fall 2005 EE42/100, Prof. White 11Fig. 1. Calculated energy levels in the diamond structure as a function of assumed atomic spacing at T = 0o K. (From “Introduction to Semiconductor Physics”, Wiley, 1964)Week 14a, Fall 2005 EE42/100, Prof. White 12In Fig. 1, at right atoms are essentially isolated; at left atomic separations are just a few tenths of a nanometer, characteristic of atoms in a silicon crystal.• If we start with N atoms of silicon at the right, which have 14 electrons each, there must be 14N allowed energy levels for the electrons. (You learned about this in physics in connection with the Bohr atom, the Pauli Exclusion principle, etc.)• If the atoms are pushed together to form a solid chunk of silicon, the electrons of neighboring atoms will interact and the allowed energy levels will broaden into energy bands.Week 14a, Fall 2005 EE42/100, Prof. White 13When the “actual spacing” is reached, the quantum-mechanical calculation results are that:• at lowest energies very narrow ranges of energy are allowed for inner electrons (these are core electrons, near the nuclei);• a higher band of 4N allowed states exists that, at 0oK, is filled with 4N electrons;• then an energy gap, EG, appears with no allowed states (no electrons permitted!); and• at highest energies a band of allowed states appears that is entirely empty at 0oK. Can this crystal conduct electricity?Week 14a, Fall 2005 EE42/100, Prof. White 14NO, it cannot conductor electricity at 0o K because that involves moving charges and therefore an increase of electron energy – but we have only two bands of states separated by a forbidden energy gap, EG. The (lower) valence band is entirely filled, and the (upper) conduction band states are entirely empty. To conduct electricity we need to have a band that has some filled states (some electrons!) and some empty states that can be occupied by electrons whose energies increase.Week 14a, Fall 2005 EE42/100, Prof. White 15A. Conductors such as aluminum and gold can conduct at lowtemperatures because the highest energy band is only partly filled – there are
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