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Berkeley ELENG 100 - Bipolar Transistor Operating Modes

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Bipolar Transistor Operating Modesð Active Mode: Vce> 0:3V; Vbe=0:7Vð Cutoô Mode: Ice=0;Vbe< 0:7Vð Saturation: Vce=0:3V; Vbe=0:7Vð Reverse Mode: Vbe< 0:7V; Vbc=0:7VBJT Flow ChartCMOS NAND GateABVddABCMOS NOR GateAQ1Q2BQ3Q4FCMOS Transmission GatePowerð Active Power = Re(VRMSIüRMS)ð Reactive Power = Im(VRMSIüRMS)ð Apparent Power = jVRMSIRMSjð Total Power in Balanced 3á =3ý Páð Power Factor = Active Power / Apparent Powerð Power Factor = cos íPower Factor Correctionð Eliminate Reactive Powerð Always Uses Reactive Elementð IPFC= ÿjIm(IL)ð XPFC= ÿ1=(Im(1=ZL))Synchronous Machine Phasor DiagramInduction Motor ModelR0jX0(N1=N2)2ï1 ÿ ssîR2R00=(N1=N2)2R2R0= R1+ R00X0= X1+(N1=N2)2X2Mechanical Power per PhaseP0=s(1 ÿ s)R00V2[sR0+(1ÿ s)R00]2+ s2X02Conjugate Match Maximizes PowerXL(opt)=ÿXTRL(opt)=RTZL(opt)=ZüTPmax=jVTj28RTParallel L-C Circuit IIRLCVoutVout=IZ=IR + j!L(1 ÿ !2LC)+j!RCParallel L-C Circuit III R L CVoutVout=IZ=Ij!L(1 ÿ !2LC)+j!L=R!20=1LCQ = R=(!0L)General DC Circuit Exampleÿ+8V8õ24õ 1A4õX Y1A1õÿ+2VABKCL equationsKirchoô's Current Law (KCL)at Node X:8 ÿ VX8ÿVX24+1+VYÿ VX4=0KCL at Node Y :2 ÿ VY1ÿ 1+VXÿ VY4=0KCL equations Contd.Collecting terms:ÿ1024VX+14VY= ÿ214VXÿ54VY= ÿ1KCL equations Contd.Rationalized Matrix Equation:0BBBB@5 ÿ3ÿ151CCCCA0BBBB@VXVY1CCCCA=0BBBB@+24+41CCCCAKCL equations Contd.Solve by Cramer's Rule:þ=25ÿ 3=22VX=1þdet0BBBB@24 ÿ3451CCCCA=6VY=1þdet0BBBB@524ÿ141CCCCA=2Transformations: Box \A"ÿ+8V8õ1A 8õ1A 8õ 24õ 1A 2A 6õThevenin Equiv.: Box \A"2A 6õÿ+12V6õTransformations: Box \B"ÿ+2V1õ2A 1õ2A 1õ 1A 1A 1õThevenin Equiv.: Box \B"1A 1õÿ+1V1õSolution w/ Thevenin Equivs.ÿ+12V6õ 4õ 1õÿ+1VXY1AVX=12ÿ 6(1) = 6VY= 1 + 1(1) =


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Berkeley ELENG 100 - Bipolar Transistor Operating Modes

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