NOTE: in all casesProblem 1: Current mirrorProblem 2: Differential amplifierProblem 3: Feedback
Problem 4: StabilityCalculators required, closed book; Wednesday, December 15, 8 AM – 10 AM ECE 304 Fall ’04 Final Exam NOTE: IN ALL CASES 1. Put your answer first, and 2. Follow up with an outline of your solution. Each major step in the outline should 2.1. Begin with a heading that describes the objective of that step, and should 2.2. Have a body where actual work is done, not just hand waving, and should 2.3. Conclude with a quantitative statement of the major result for that step (a number or formula or both). For all problems take the thermal voltage as VTH = 25.864 mV. Problem 1: Current mirror Follow the outline procedure at the top of the exam with headings for each major step in the solution. No points for answer without an outline of the solution. A mish-mash of calculations is not an acceptable outline. +R2{R_E}+R3{R_E}QnQ10+-V2{V_S}+-V1{-V_CC}.model Qn NPN (Bf={Beta},Is={I_S})0QnQ2+R1{R_R}PARAMETERS:Beta = 20I_S = 10fAPARAMETERS:V_CC = 15V0I FIGURE 1 Current mirror for Problem 1 V_S-15V -10V -5V 0V 5V 10V 15V-I(V2)-20mA0A20mA(-10.23,0.00)(15.00,6.649m)(-7.830,6.643m) FIGURE 2 Current vs. DC voltage for current mirror of Figure 1 Select values of RR and RE so the mirror will have the I-V behavior seen in Figure 2. Assume the maximum forward CB bias in saturation is VCB = –VSAT = –500 mV. Note that all transistors have infinite Early voltages. Unpublished work © 12/6/2004 J R Brews Page 1 12/10/2004Calculators required, closed book; Wednesday, December 15, 8 AM – 10 AM Problem 2: Differential amplifier Follow the outline procedure at the top of the exam with headings for each major step in the solution. No points for answer without an outline of the solution. A mish-mash of calculations is not an acceptable outline. .model Qn NPN (Is={I_S},Bf={Beta}).model Qp PNP (Is={I_S},Bf={Beta})PARAMETERS:I_S = 10fABeta = 100I1{I_E}QnQ200PARAMETERS:VCC = 15VI_E = 20mAI_B = 100uAV_S = 0VQpQ300VQnQ1+R2{R_B}+-V2{V_S}0+R1{R_T}+-V1{VCC}PARAMETERS:R_T = {3*R_B}R_B = 1kI2{I_B} OutFIGURE 3 Differential amplifier hooked up as a noninverting op amp For the amplifier in Figure 3 1. Sketch four schematics, one for each of the cases VS = 10V, 2.5V, –5V and –15V. On each schematic label the modes of all transistors and the value of VOUT. 2. Sketch the transfer curve VOUT vs. VS for –15V ≤ VS ≤ 15V. 2.1. Label all key break points with VS- and VOUT-coordinates. 2.2. Label the slopes of all segments. 2.3. Label the modes of all transistors in each segment of the transfer curve. Assume the thermal voltage is VTH = 25.864 mV. Assume the maximum forward CB bias is VCB(npn) = VBC(pnp) = –VSAT = 0 V, and that in active mode VBE(npn)= VEB(pnp) = 700mV. Note that all transistors have infinite Early voltages. Unpublished work © 12/6/2004 J R Brews Page 2 12/10/2004Calculators required, closed book; Wednesday, December 15, 8 AM – 10 AM Problem 3: Feedback Follow the outline procedure at the top of the exam with headings for each major step in the solution. No points for answer without an outline of the solution. A mish-mash of calculations is not an acceptable outline. +R4{R_L}015.00VI110.1mA+R2{R_B}+C210_F+-VCC15V+R1{R_C}10.00mADOT-MODEL PARAMSI_S = 10fAB_F = 100C_JC = 2pFC_JE = 2pFT_F = 1ns07.000V.model Qn NPN (Is={I_S} Bf={B_F} Cjc={C_JC} Cje={C_JE} Tf={T_F})-80.00mVPARAMETERS:R_C = 800R_L = 800R_S = 800Sweep+-ACVS1V0+C310_F+R3{R_S}100.0uA+C110_F0-794.7mVQnQ1 OUTSelect the value of resistor RB to obtain a bandwidth of 6 MHz. Assume VTH = 25.864 mV. Note that the transistor has infinite Early voltage. FIGURE 4 Common emitter amplifier Unpublished work © 12/6/2004 J R Brews Page 3 12/10/2004Calculators required, closed book; Wednesday, December 15, 8 AM – 10 AM Unpublished work © 12/6/2004 J R Brews Page 4 12/10/2004 Problem 4: Stability Follow the outline procedure at the top of the exam with headings for each major step in the solution. No points for answer without an outline of the solution. A mish-mash of calculations is not an acceptable outline. +Sweep+-AC00+0 VS A(f) Vd VO + Vd – R C FIGURE 5 Open-loop amplifier; the op amp has infinite input resistance and zero output resistance The amplifier of Figure 5 contains an RC-network to adjust its frequency response. For the amplifier of Figure 5, select C to make a feedback voltage amplifier using this open-loop amplifier exhibit a 30° phase margin when βFB has a value of 1/βFB = 30 dB. Use Bode plots to do your design. Assume the op amp has a gain function given by EQ. 1 +++=3210ffj1ffj1ffj1A)f(A, with A0 = 105V/V, f1 = 105Hz, f2 = 106Hz, and f3 = 107Hz, and assume that the value of R = 10 MΩ. The op amp has infinite input resistance and zero output