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UA ECE 304 - Class AB Stage with Voltage Followers

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SchematicObjectiveCharacteristicsDesignSpreadsheetECE 304: Class AB Stage with Voltage Followers1 Schematic VPVNVNOUTVPVPINVN0+R3{R_L}0APARAMETERS:R_B = 5kR_L = 100V_CC = 15VV_DC = 0+-VN{-V_CC}8.552mA+-V1{V_DC}651.2mV15.00V.model Q_P2 PNP (Bf={B_FP2} Is={I_SP2})15.00V+R1{R_B}2.870mAPARAMETERS:I_SN1 = 33fAI_SN2 = 33fAI_SP1 = 33fAI_SP2 = 33fAB_FN1 = 200B_FN2 = 200B_FP1 = 200B_FP2 = 200.model Q_N1 NPN (Bf={B_FN1} Is={I_SN1}).model Q_N2 NPN (Bf={B_FN2} Is={I_SN2})00V.model Q_P1 PNP (Bf={B_FP1} Is={I_SP1})-15.00VSweep+-ACVac1V3.361e-18A+-VP{V_CC}8.552mA0Q_N2Q_N14.21uA-2.856mA+R2{R_B}2.870mAQ_P1QP-14.21uA-2.841mA2.856mAQ_N1QN14.21uA2.841mA-2.856mA-651.2mVQ_P2Q_P-14.21uA2.856mA0-15.00V0V FIGURE 1 Class AB stage with separate emitter follower input for each output transistor; parameters chosen to agree with S&S Exercise 14.11, p. 1257 Objective The circuit of Figure 1 has three merits (i) it is symmetrical in its treatment of positive and negative output swings; (ii) it has high input impedance because of the impedance transformation properties of the voltage followers, and (iii) it exhibits zero output for zero input. A demerit of the circuit is that there is only one design parameter, R_B, that sets both the crossover distortion and the maximum output swing, so there is not independent adjustment. Characteristics V_DC-15 -10 -5 0 5 10 15V(OUT)0V0.5V1.0V(11.07,950.00m)(-11.07,950.00m)(5.780,991.04m)(0.00,954.74m)(-5.790,991.04m) FIGURE 2 Small-signal gain at RB = 5 kΩ vs. DC input voltage showing symmetry of positive and negative behavior, and dip in gain in the crossover region 1 See Sedra and Smith, Section 14.7, pp. 1256-1257. Unpublished work © 2/22/2005 J R Brews Page 1 2/22/2005Design +-VN{-V_CC}5.265mA010.74V15.00V+R3{R_L}100.0mA+R2{R_B}4.896mA15.00VSweep+-ACVac1V22.60uA0+-V1{V_DC}10.00V+-VP{V_CC}105.2mAQ_P1QP-86.13nA-17.23uA17.32uA-15.00VQ_P2Q_P-1.760uA353.8uA0Q_N2Q_N24.36uA-4.896mAPARAMETERS:R_B = 5kR_L = 100V_CC = 15VV_DC = 10.14599V9.481V0-15.00V+R1{R_B}851.4uA10.15VPARAMETERS:I_SN1 = 33fAI_SN2 = 33fAI_SP1 = 33fAI_SP2 = 33fAB_FN1 = 200B_FN2 = 200B_FP1 = 200B_FP2 = 200Q_N1QN497.6uA99.52mA-100.0mA VNVNVNOUTVPINVPVPFIGURE 3 High output voltage case; the low (negative) output case is a reflection In the high output case, +000+-++- RL VO )1(IR/V1NPLO+β+LORVBBEOCCR)VV(V +−IP VBE IMIN VCC RB VIN –VCC FIGURE 4 High-output voltage case approximating the current in QP near cutoff as IP Using Figure 4, we determine the minimum emitter current to the VF transistor IMIN is EQ. 1 )1(IR/VR)VV(VI1NPLOBBEOCCMIN+β+−+−=, where VBE = VTH lnβ++)/11(IIR/V1N1SNPLO, and a small leakage current correction IP accounts for the PNP not being completely cutoff. Evidently, if RB is chosen too large, IMIN will drop to zero and the VF will cut off, disconnecting the signal from the amplifier. If we use IMIN as a design parameter we find RB from EQ. 1 as EQ. 2 below. Unpublished work © 2/22/2005 J R Brews Page 2 2/22/2005EQ. 2 )1(IR/VI)VV(VR1NPLOMINBEOCCB+β+++−= . EQ. 2 contains both IMIN and VO. On the other hand, looking at the zero output case, we find another condition on RB. 0+0++ VPVNVBEQ1 = VBEQ2. VBEQ1 1IQ+βB1BEQCCRVV −QP2 QN1 QN2 RB 0 V 0 V IQ VBEQ2 VEBQ2 VEBQ1 0 QP1 FIGURE 5 Zero output voltage case Using Figure 5, KVL around the interior loop provides EQ. 3 VBEQ1 + VEBQ1 = VBEQ2 + VEBQ2. Assuming the output NPN and PNP transistors are matched, VBEQ1 = VEBQ1. Likewise, assuming the EF transistors are matched, VEBQ2 = VBEQ2. Then EQ. 3 implies that EQ. 4 These voltages are related to the currents by the diode law, so EQ. 4 means EQ. 5 2SN2N1NQBBEQCC1SN1NQI)/11(1IRVVI)/11(Iβ++β−−=β+ or EQ. 6 +β+β−≈+β+β+β+⋅−=21IVV11)/11()/11(II1IVVR1N1NQBEQCC1N1N2N1SN2SNQBEQCCB, Unpublished work © 2/22/2005 J R Brews Page 3 2/22/2005where the approximation holds if the emitter-follower transistors are matched to the power-output transistors (ISN1 = ISN2 and βN1 = βN2). In EQ. 6, VBEQ = VTHlnβ+1SN1NQI)/11(I. Notice that EQ. 6 depends neither on IMIN nor VO. That is, IQ and RB both express the crossover distortion. According to EQ. 6, once the Q-point current is decided (based upon how large a crossover distortion we want), RB is determined. The larger is IQ (the lower the desired distortion), the smaller RB. But according to EQ. 2, once RB is determined, the output voltage VO is EQ. 7 L1NBB1NPMINBECCOR)1(R1R1IIVVV+β++β+−−= . The coupling of these two characteristics (crossover distortion and maximum output swing) is shown in Figure 6. V_DC-15V-10V-5V0V5V10V15VD(V(OUT))0.800.850.900.951.00(R_B=10k,9.184,950.00m)(R_B=5k,11.07,950.00m)(R_B=1k,13.21,950.00m)(R_B=10k,915.02m)(R_B=5k,954.74m)(R_B=1k,989.16m) FIGURE 6 Gain plot showing coupling of increased crossover distortion and lower allowed output swing as RB is increased To avoid cutoff, IMIN ≥ 0 A, so the maximum value of output voltage is, from EQ. 7, EQ. 8 L1NBBECCMAX,OR)1(R1VVV+β+−= . In practice, the gain will suffer before IMIN is reduced to zero so, to avoid distortion, it will be necessary to use IMIN > 0 and, according to EQ. 7, VO for low distortion will not be as large as VO,MAX. Spreadsheet The above equations are installed in a spreadsheet in Figure 7. The spreadsheet is set up to use IMIN and IQ as variables, and calculates RB and VO. As S&S used the reverse approach, values for IMIN and IQ were input from PSPICE and verification consists of checking that RB = 5 kΩ and VO = 10V. The spreadsheet passes these tests. An iteration is needed to find VBE and VO as outlined on the spreadsheet. The PNP leakage is a small correction, and is input from the PSPICE schematic to fine tune the end result. Unpublished work © 2/22/2005 J R Brews Page 4 2/22/2005FIGURE 7 Spreadsheet incorporating the above formulation Unpublished work © 2/22/2005 J R Brews Page 5


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UA ECE 304 - Class AB Stage with Voltage Followers

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