Schematic:AnalysisHigh bias conditionZero output voltageLow output voltageS&S Example 14.2, p.1245PSpice verificationZero output caseMaximum and minimum output conditionsDistortionAppendixDiode model in PSpiceECE 304: Diode Biased Class AB Output Stage Schematic: +-V2{V_CC}+R1{R_L}0I1{I_B}0 00VPWL_ENHQ_NQN+-V3{-V_CC}DnpD2DnpD1Q_PQP+-V4{V_DC}0 BNVPVNOUTBPVPINVNINBNOUTVPFIGURE 1 Diode biased class AB output stage Analysis The circuit has to be analyzed by looking at three cases: high output voltage, zero output voltage and low output voltage. Each bias condition provides some of the design. HIGH BIAS CONDITION I1{I_B}00DnpD1VPWL_ENHQ_NQN+-V4{V_DC}0DnpD2+R1{R_L} Vmax LmaxR)1(V+βLmaxRVIB IDmin FIGURE 2 Analysis for high output voltage condition In the high bias condition, the largest load current is drawn Vmax/RL. As a result, the largest base current is drawn by the NPN. As the bias current is fixed at IB, and the largest base current is drawn, the least diode current is drawn. It is taken as I Dmin, and it is a design parameter. That is, it Unpublished work © 2/15/2005 J R Brews Page 1 2/17/2005is adjusted to optimize the design. A low IDmin causes the diodes to approach cutoff, and that decouples the driver from the circuit, causing distortion. A large IDmin raises power consumption. KCL at the base node BN provides IB: EQ. 1 LmaxminDBR)1(VII+β+=. ZERO OUTPUT VOLTAGE INBPVPOUTBNVN0+-00+ VO= 0V LQR)1(I+βQIQIIB LQBR)1(II+β−0 A FIGURE 3 Zero output voltage condition For zero output voltage, there is zero load current, so the emitter currents of both transistors are the same, and are related to the base-to-base voltage VBB ≡ VBN – VBP by the diode law, namely EQ. 2 β+=SQTHBBI)/11(InV2V l. The size of IQ is related to the crossover distortion. The larger IQ, the more “on” the transistors are in the crossover region, the larger is VBB, and the less is the distortion. While VBB controls IQ, the voltage VBB is set by the diode drops, that is, EQ. 3 +β−=SDQBTHBBI)1(IInV2V l. Now IB has already been determined by EQ. 1, so to set VBB at a desired value to meet a crossover distortion specification the only knob we have to turn is the diode scale current ISD. This is adjusted by adjusting the diode area, because ISD is proportional to the diode area. If we suppose that we know what VBB-value we want (for example, if we know how crossover distortion is related to VBB) then we can use EQ. 2 and EQ. 3 to find how big ISD must be in relation to IS of the bipolars. Equating these two equation we find EQ. 4 11II)11(IIQBSSD+β−β+= . The bigger we make IQ, the smaller ISD must be and the smaller the diode area. This makes sense because a smaller diode carries less current, so needs a larger diode drop to compensate. Unpublished work © 2/15/2005 J R Brews Page 2 2/17/2005Hence, the smaller the diode area, the larger VBB will become, and the less the distortion will become. The design is complete at this point. However, in some cases, such as for drivers using a voltage follower, the low voltage case also has to be examined. LOW OUTPUT VOLTAGE BPVNOUTINLow bias condition with VO = –Vmin 0+00+- –Vmin LminBR)1(VI+β+IB LminRVLminRVLminR)1(V+βFIGURE 4 In the low bias condition the NPN transistor is in cutoff, so all of IB goes through the diodes. Therefore, we can calculate the value of VBB for this situation as EQ. 5 =SDBTHminBBIInV2)V(Vl . The current leaving the output stage through the driver is LminBR)1(V+β+I. In the case pictured in Figure 4 with a simple voltage driver, this current simply goes through the driver to ground. However, if a voltage follower were used as input, we would have to design the voltage follower with a large enough bias current to absorb LminBR)1(V+β+I without causing cutoff of the voltage follower. S&S EXAMPLE 14.2, P.1245 Assuming VCC = 15V, RL = 100Ω, and a maximum output of 10V. Let QN and QP be matched with IS = 10–13A and β = 50. Assume the biasing diodes have one-third the junction area of the bipolars. Find the value of IB that guarantees a minimum of 1 mA through the diodes at all times. Find the quiescent current and power dissipation in the transistors. Find VBB for υO = 0, 10 and –10 V. Unpublished work © 2/15/2005 J R Brews Page 3 2/17/2005S&S Example 14.2InputV_TH 0.025864B_dc 50I_S 1.00E-13I_SD 3.33333E-14I_Dmin 1.00E-03V_max 10R_L 100High VoI_Dmin+V_max/(R_L*(B_dc+1)) I_B 0.0029607842*V_TH*LN(I_Dmin/I_SD) V_BB_low 1.247910233Zero Vo2*V_TH*LN(I_B/(I_S/3+I_S/(B_dc+1))) V_BB 1.301101918I_S*EXP(V_BB/(2*V_TH))*(1+1/B_dc) I_Q 0.008556667Low Vo2*V_TH*LN(I_B/I_SD) V_BB_high 1.304058608 FIGURE 5 Spreadsheet solution to Example 14.2 PSPICE verification The bias current IB in the PSPICE simulation is I_B=2.9626mA, instead of the spreadsheet value of I_B=2.961mA. The reason for this change is explained later. ZERO OUTPUT CASE 1.301VI1{I_B}2.963mA.model Dnp D Is={I_SD}-15.00VDOT-MODELI_SD = {I_S/3}I_S = 100fAB_F = 50+-V2{V_CC}8.385mA0Q_NQN167.7uA8.385mA-8.553mADnpD2-+Transient AnalysisVSIN{V_SF}1kHz2.963mA.model Q_N NPN Bf={B_F} Is={I_S}.model Q_P PNP Bf={B_F} Is={I_S}-650.5mV0-++-E1GAIN = 1000-650.5mV+R1{R_L}2.603pA+-V3{-V_CC}8.385mADnpD12.795mA15.00V0+-VDC{V_DC}-264.2pVPARAMETERS:R_L = 100I_B = 2.9626176mAT_SF = 1msV_DC = -650.542934mVV_CC = 15VV_SF = 10V/V-15.00V650.5mV-260.3pVQ_PQP-167.7uA-8.385mA8.553mA15.00V VNBNVPOUTVNVPBNBPBPBBIN FIGURE 6 Output stage in zero output conditions with VO = 0V; the bipolars carry the quiescent current in this case of 8.553 mA, the diodes 2.795 mA; base-to-base voltage VBB = 1.301 V MAXIMUM AND MINIMUM OUTPUT CONDITIONS In the maximum output condition VO = 10V, the diodes should carry their minimum current of I_Dmin=1mA. If we use the spreadsheet value of I_B = 2.961mA, the minimum diode current will be less than 1mA because the PNP transistor is not entirely cut off, and this very small extra Unpublished work © 2/15/2005 J R Brews Page 4 2/17/2005current also has to be supplied by I_B. Therefore, PSPICE is used to find the needed value I_B = 2.963 mA for I_Dmin = 1 mA. -+Transient AnalysisVSIN{V_SF}1kHz1.002mAQ_NQN1.963mA98.13mA-100.1mA000+-VDC{V_DC}1.248VDnpD2-++-E1GAIN = 110.71VDnpD11.000mA10.00V9.466VPARAMETERS:R_L = 100I_B = 2.9626176mAT_SF = 1msV_DC = 9.4662453VV_CC = 15VV_SF = 10V/VDOT-MODELI_SD = {I_S/3}I_S = 100fAB_F = 5015.00V.model Dnp D