ECE 304: The Differential AmplifierSchematicCurrent-mirror sourcing of base currentVpwl_EnhBackgroundRange of resistors values RT, RBLarge-signal behaviorFeedbackInput resistanceOutput resistanceLoading of gainCommentsSummaryECE 304: The Differential Amplifier Schematic +R4{R_M}10.06V+R9{R_B}VPWL_ENHFIRST_NPAIRS = 0,0, 0.5,-1, 1,0, 1.5,1, 2,0, 2.5,-1, 3,0, 3.5,1, 4,0TSF = {T_SF}VSF = {V_SF}0-15.00VSweep+-ACVac1V+R2{R_C}9.873mA+-V1{V_CC}+R5{R_E}-12.28V-13.01VQ6Q2N2907A-50.17uAQ2Q2N22229.873mA0+R1{R_C}9.873mAQ3Q2N2222Q4Q2N2222I2{I_B}+C210_F+-VDC{V_DC}PARAMETERS:T_SF = 1msV_SF = 1V10.06V0PARAMETERS:V_CC = 15VI_Q = 20mA I_B = 45.916uAR_S = 1k R_C = 500R_T = {R_B}R_B = 1kR_M = 100R_E = 100V_DC = 0V0+C110_F-13.01V15.00V-50.17mV15.00V-50.17mV15.00V+-V2{-V_CC}-753.1mV+R7 {R_S}+R8{R_T}I1{I_Q}+R3{R_M}0-15.00V10.06V+R6{R_E}0Q1Q2N222250.17uA9.873mAQ5Q2N2907A OUTVP VNFBVNVP VPFIGURE 1 Differential amplifier with resistor load and current mirror biasing Figure 1 shows the circuit diagram for a differential amplifier set up to act as a noninverting amplifier with gain υOUT = υIN (1+ RT/RB). Three bias sources are shown: DC source VDC, small-signal source Vac, and transient source VPWL_ENH. Several points need explanation: CURRENT-MIRROR SOURCING OF BASE CURRENT The base current is supplied through the current mirror made up of Q2N2907A transistors. The base current IB is set using a pot, and trimmed to balance the differential amplifier at zero input voltage. Small changes in IB will unbalance the diff amp, so this design is not very robust. This current mirror has an output resistance large enough to avoid shunting the AC feedback current away from the input transistor Q2 of the differential amplifier. The purpose of providing base current through a mirror is to allow the use of coupling capacitors to connect the feedback loop made up of R_T and R_B. Blocking DC current to these resistors avoids disturbance of the Q-point of the differential amplifier by these resistors. The capacitor connection also means we get zero output voltage for zero input voltage. Unfortunately, the capacitors also mean that the circuit does not work down to DC. Therefore, we need to use a transient input to make the circuit work, in this case a saw tooth input waveform provided by part VPWL_ENH. VPWL_ENH The source VPWL_ENH allows the input of piecewise linear voltages. In this example the variable FIRST_NPAIRS has been set to generate a saw tooth input going between –V_SF and +V_SF with a period of 2T_SF. These variables are filled in on a menu displayed by double-clicking on VPWL_ENH. Unpublished work © 2/1/2005 John R Brews Page 1 2/1/2005Background RANGE OF RESISTORS VALUES RT, RB Let's assume that RT = RB so the gain is υOUT = 2υIN. We find the gain as a function of RT using PSPICE. R_B100 300 1.0K 3.0K 10K 30K 100KMax(V(OUT))1.01.52.0(6.2322K,1.8000)(234.385,1.8000)(1.1159K,1.8682)(100.000,1.4136) FIGURE 2 Noninverting amplifier gain as a function of feedback resistor value RB Figure 2 shows that the gain for the design of Figure 1 is approximately the expected value of 2 provided RB is not too low (say above 234 Ω) and not too high (say below 6.2 kΩ). The closest we get to 2 V/V is 1.87 V/V at RB = 1.12 kΩ. Next we explore the reasons for this dependence on RB. The first influence of the feedback resistors we examine is the effect on the diff amp gain, caused because RT and RB are connected to the output node, causing RC in the gain expression (ICRC/(2VTH) to be replaced by a lower resistance. +R4{R_M}-++-E1GAIN = 10Q6Q2N2907AQ3Q2N2222Q1Q2N2222+R5{R_E}I1{I_Q}+R6{R_E}VPWL_ENHFIRST_NPAIRS = 0,0, 0.5,-1, 1,0, 1.5,1, 2,0, 2.5,-1, 3,0, 3.5,1, 4,0TSF = {T_SF}VSF = {V_SF}Q5Q2N2907A0+R9{R_B}I2{I_B}0Sweep+-ACVac1V+C110_F+R7 {R_S}+C210_F+R1{R_C}+-V2{-V_CC}+R8{R_T}0+-V1{V_CC}+R3{R_M}PARAMETERS:T_SF = 1msV_SF = 1V000Q4Q2N2222Q2Q2N2222+-VDC{V_DC}PARAMETERS:V_CC = 15VI_Q = 20mA I_B = 45.916uAR_S = 1k R_C = 500R_T = {R_B}R_B = 1kR_M = 100R_E = 100V_DC = 0V+R2{R_C} VNVPVNVPVPFBOUTFIGURE 3 Schematic of Figure 1 with a VCVS (circled in blue) added to provide an infinite load impedance to the differential amplifier Unpublished work © 2/1/2005 John R Brews Page 2 2/1/2005Figure 3 shows the amplifier with VCVS (PSPICE PART E) inserted to make the voltage divider appear as an infinite load to the differential amplifier. Because the load impedance is now infinite, the divider no longer affects the gain of the diff amp. R_B100 300 1.0K 3.0K 10K 30K 100KMax(V(OUT))1.01.52.0(6.6519K,1.8000)(100.000,1.9095) FIGURE 4 Gain of noninverting amplifier vs. RB for the circuit of Figure 3 Figure 4 shows that removal of the loading effect on the gain of the diff amp allows operation down to very low values of RB. +R4{R_M}-++-E1GAIN = 10Q6Q2N2907AQ3Q2N2222Q1Q2N2222+R5{R_E}I1{I_Q}+R6{R_E}VPWL_ENHFIRST_NPAIRS = 0,0, 0.5,-1, 1,0, 1.5,1, 2,0, 2.5,-1, 3,0, 3.5,1, 4,0TSF = {T_SF}VSF = {V_SF}Q5Q2N2907A0+R9{R_B}I2{I_B}0Sweep+-ACVac1V+C110_F+R7 {R_S}+R1{R_C}-++-E2GAIN = 1+-V2{-V_CC}+R8{R_T}0+-V1{V_CC}+R3{R_M}PARAMETERS:T_SF = 1msV_SF = 1V0000Q4Q2N2222Q2Q2N2222+-VDC{V_DC}PARAMETERS:V_CC = 15VI_Q = 20mA I_B = 45.916uAR_S = 1k R_C = 500R_T = {R_B}R_B = 1kR_M = 100R_E = 100V_DC = 0V+R2{R_C} VNVPVNVPVPFBOUTFIGURE 5 Noninverting amplifier with two decoupling VCVS's (PSPICE PARTS E) Unpublished work © 2/1/2005 John R Brews Page 3 2/1/2005R_B100 300 1.0K 3.0K 10K 30K 100KMax(V(OUT))1.01.52.0(100.000K,1.9122)(100.000,1.9123) FIGURE 6 Gain of noninverting amplifier when two VCVS are used to decouple the diff amp from the voltage divider Figure 6 shows the gain when an additional VCVS is added. This VCVS presents an infinite shunting resistance across RB, compared to the resistance looking into the base of Q2 in Figure 3.1 Consequently, the diff amp does not alter the divider action. Also, the decoupling VCVS increases the diff amp gain by removing RB from the AC base circuit of the diff amp. Higher gain improves the performance of the noninverting amplifier. In summary, the feedback network composed of RT, RB reduces the performance of the differential amplifier by lowering its gain, and the low differential amplifier input impedance reduces the ability of the feedback network to act as an ideal voltage divider. Large-signal behavior Time0s 0.5ms 1.0ms 1.5ms 2.0ms 2.5ms 3.0msV(OUT)-4.0V0V4.0V(VSF=3V,3.9354)(VSF=2V,3.6698)(VSF=1V,1.8678) FIGURE 7 Output waveform for three different saw tooth amplitudes Figure 7 shows