Copyright by John R Brews Page 1 12/22/2001ECE 304: Using PSPICE Hierarchical Block DesignsTable of ContentsHierarchical Block Designs..............................................................................................2Figure 1:...................................................................................................................2The NEW PROJECT menu: a new folder is created for the project using the BROWSEbutton. ............................................................................................................................ 2Figure 2:...................................................................................................................2The CREATE PSPICE PROJECT menu. We select CREATE A BLANK PROJECT. ................... 2Figure 3:...................................................................................................................3Election to place an hierarchical block ........................................................................... 3Figure 4:...................................................................................................................3The PLACE HIERARCHICAL BLOCK menu. A SCHEMATIC VIEW is selected as theIMPLEMENTATION TYPE because we want to draw a schematic for the underlying circuit......................................................................................................................................... 3Figure 5:...................................................................................................................4With the mouse, a rectangle of arbitrary size is drawn on the schematic page. Theprogram itself adds the BLOCK REFERENCE and the IMPLEMENTATION NAME at the top andbottom. ........................................................................................................................... 4Figure 6:...................................................................................................................4With the block highlighted, selection of PLACE/HIERARCHICAL PIN .................................. 4Figure 7:...................................................................................................................4The PLACE HIERARCHICAL PIN menu. The TYPE is immaterial - it just changes thegraphic for the pin, but not its function. The NAME is arbitrary as well. .......................... 4Figure 8:...................................................................................................................5The hierarchical block with the pins added and renamed.............................................. 5Figure 9:...................................................................................................................5The menu for naming the schematic corresponding to the block. ................................. 5Figure 10:.................................................................................................................5The new schematic obtained by “drilling down” from the hierarchical block.................. 5Figure 11:.................................................................................................................6The schematic from another circuit pasted into the block schematic ............................ 6Figure 12:.................................................................................................................6The Common Source Amplifier schematic as modified from Figure 11. The outsideworld is properly connected to the hierarchical block pins, and parts properly leftoutside the block are removed.. ..................................................................................... 6Figure 13:.................................................................................................................7Preparing to copy the file MOSFET.LIB in the CS MOSFET circuit and paste it into theMODEL LIBRARY in the TWO-STAGE AMPLIFIER circuit....................................................... 7Figure 14:.................................................................................................................7The external connections added to the hierarchical block and a Q-point analysis run.. 7Figure 15:.................................................................................................................8The Q-point data seen at the schematic level when drilling down (descending thehierarchy) from the block of Figure 14. .......................................................................... 8Figure 16:.................................................................................................................8The final block diagram with the source follower added ................................................ 8Figure 17:.................................................................................................................9The Source Follower at the Q-point on drilling down from the SF hierarchical block .... 9Figure 18:.................................................................................................................9The Common Source amplifier on drilling down from its hierarchical block. The Q-pointvalues in this figure differ from those in Figure 15 because the SF loads the CSdifferently than the load resistor of Figure 14................................................................. 9Copyright by John R Brews Page 2 12/22/2001ECE 304: Using PSPICE Hierarchical Block DesignsHierarchical Block Designs1Cadence PSPICE also allows a block design approach to circuits. For example, amultistage circuit can be shown as a cascade of blocks with input and output leads, anddrilling down (descending the hierarchy) exposes the circuit that is inside the box. In thisway clutter is reduced and the “big” picture of the amplifier is easier to see. As anexample, let’s make a two-stage amplifier with a Common Source input stage and aSource Follower output stage. We begin the process as usual, with FILE/NEW PROJECT.FIGURE 1:The NEW PROJECT menu: a new folder is created for the project using the BROWSE button.FIGURE 2:The CREATE PSPICE PROJECT menu. We select CREATE A BLANK PROJECT. 1 See Herniter’s updates at his Web Site, http://www.rose_hulman.edu/~herniter/Copyright by John R Brews Page 3 12/22/2001Once the project is created, we proceed to place an hierarchical block on the schematic.FIGURE 3:Election to place an hierarchical blockFIGURE 4:The PLACE HIERARCHICAL BLOCK menu. A SCHEMATIC VIEW is