UNCC ECGR 6185 - Data Logging Solution for Digital Signal Processors

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Data Logging Solution for Digital Signal ProcessorsIntroductionBlock DiagramSystem DesignFinal System Set-upPseudo code (DSP operation)Pseudo code (TS7200 operation)SPI Transmission ProtocolSlide 9Characteristics of SPI Transmission ProtocolSPI Transmission LimitationsTS7200 Limitations on SPI TransmissionTCP ImplementationSystem PerformanceConclusionData Logging Solution for Digital Signal ProcessorsBrian NewberryNekton Research, [email protected] M. ConradUniversity of North Carolina at [email protected] Analyzing analog data collected by AUV (Autonomous Underwater Vehicle) Embedded DSP Data Logger Design for audio signal Digital Signal Processor (DSP) – multiple instructions per cycle DSP can process audio and video signals with high data rates DSPs consume low powerBlock Diagram HydrophoneDSP PC SBC memorySPI / TCP EthernetADCSystem DesignComponent SpecificationDSP – DSK6416T 1 MB RAM (onboard), 16 MB RAM (offboard), 512 KB FlashADC (onboard) 96 kHz/s – sample rate (100 kHz required)Compact Flash Memory Card 256 MB, low power,22 minutes data can be stored one timeTS-7200 Compact Flash ControllerSingle board ARM based Linux machine,Data rate- 1 Mbit/s, 1 mW power consumption,OS- 5 MB RAM, data rate 0.85 MB/s,FTP (File Transfer Protocol) serverRS232 (Serial Communication) DSP communicates with hyperterminalFinal System Set-up TS7200DSPPower supplyRS232 Flash memoryPseudo code (DSP operation) Initialize systemWait till told to startWhile not told to quit{Gather audio data from codecProcess audio dataReport resultsSend audio data to TS-7200 over SPIWait till reaction to reported results is complete}Pseudo code (TS7200 operation)Initialize systemWhile true{Get Data packetOutput amount of data receivedStore Data packet}SPI Transmission ProtocolDeveloped by MotorolaFast synchronous serial port communicationMaster-slave architectureDSP- master and TS7200-slave1 bit from master to slave n vice versa per secondConnections: clock, frame, ground, master-in-slave-out, master-out-slave-inSPI Transmission ProtocolSignal DiagramCharacteristics of SPI Transmission ProtocolSlave can transmit to Master only and only if Master is transmitting at the same time or else Slave has to waitNo acknowledgement sent either by Master or SlaveNo guarantee of transmission qualityCan change polarity of signalAdditional bit can be induced for delayZero overheadSPI Transmission LimitationsTransmission speed totally dependent upon Master’s clock speedIf TS7200 would have been used as Master; speed range – 29 kHz to 3.7 MHzSPI – mainly intraboard protocolWhen used interboard – causes EMI (Electromagnetic Interference)TS7200 Limitations on SPI TransmissionLinux 2.4 kernel on TS7200 - not a RTOS (Real Time Operating System)Linux not a preemptive – current task has to be finished; before starting new oneHence OS can not respond immediately to event occurred as DSPProbability of data loss in consecutive samplesTCP ImplementationTo ensure, TS7200 receives data successfully from DSPDSP implementation of TCP - Masterdata to slave in packetsspecial 16-bit value acknowledgement from TS7200 is awaitedTS7200 implementation of TCP – Slavecount values received from DSP on SPI portone value – correct receptiondifferent value – incorrect receptionSystem PerformancePer minute - 20 seconds data is gathered, analyzed and storedPower consumption is minimumapprox. 7 watts – linear voltage regulator4.5 watts – direct power supply, no regulatormore efficient switching power supply neededIf TS7200 – directly mounted over DSP board – data transfer speed would improveConclusionDSP not burdened with memory storage – merely processes dataMemory controller system – low power and economicalSuccessful data transmission from static storage to separate PC DSP controls what data is loggedSystem could be – stand-alone data loggerLow cost, low power and miniature


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UNCC ECGR 6185 - Data Logging Solution for Digital Signal Processors

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