EECS240 – Spring 2008Lecture 22: MOS Sample and HoldElad AlonDept. of EECSEECS240 Lecture 22 2MOS Sample & HoldIdeal Sampling Practical SamplingvINvOUTCS1φ1vINvOUTCM1φ1• Grab exact value of Vinwhen switch opens• kT/C noise• Limited bandwidth• Rsw= f(Vin) Æ distortion• Switch charge injection• Clock jitterEECS240 Lecture 22 3Switch ResistanceEECS240 Lecture 22 4Acquisition Bandwidth• Finite switch R Æ finite bandwidth• Assuming constant Vin and C starts at 0V:• Leads to min. switch size for given bandwidth, resolution• Linear settling calc. – remember may only get T/2• (Will C always start at 0V?)vINvOUTCS1φ1R()τ/1)(tinoutevtv−−=EECS240 Lecture 22 5Switch RonNon-LinearityEECS240 Lecture 22 6Sampling Distortion0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45-120-100-80-60-40-200 H1 = -49.4dBFS H2 = -66.3dBFS H3 = -105.2dBFS DC = -43.4dBFS A = -0.1dBFSFrequency [ f / fs ]Amplitude [ dBFS ]N = 16384 SNR = 61.9dB SDR = 49.2dB SNDR = 47.4dB SFDR = 49.3dB⎟⎟⎠⎞⎜⎜⎝⎛−=⎟⎟⎠⎞⎜⎜⎝⎛−−−THDDinVVvTinoutevv121τT/τ = 100 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45-120-100-80-60-40-200 H1 = -69.5dBFS H2 = -76.3dBFS H3 = -83.5dBFS DC = -65.3dBFS A = -0.0dBFSFrequency [ f / fs ]Amplitude [ dBFS ]N = 16384 SNR = 62.0dB SDR = 68.6dB SNDR = 58.6dB SFDR = 69.5dBT/τ = 20EECS240 Lecture 22 7Constant VGS Sampling• Switch overdrive voltage is independent of signal• Error from finite RONis linear (to first order)EECS240 Lecture 22 8Constant VGS Sampling CircuitEECS240 Lecture 22 9Complete CircuitRef: A. Abo et al, “A 1.5-V, 10-bit, 14.3-MS/s CMOS Pipeline Analog-to-Digital Converter,” JSSC May 1999, pp. 599.Clock Multiplierfor M3SwitchM7 & M13 for reliabilityEECS240 Lecture 22 10Charge Injection• “Extra” charge dumped onto holding capacitor• Channel charge has to go somewhere• (Also get injection through Cov)• Problems:• Offset• Distortion (error charge is function of VIN)EECS240 Lecture 22 11Worst-Case Error ExampleC2Vin()()()mV426.03100050.3510V:Example :error pedestalmax :charge channel22=−××=∆−−==∆=−−=THSSDDoxCHSSinTHinDDoxCHVVVCWLCCQVVVVVVWLCQEECS240 Lecture 22 12Dummy Switch• Dummy switch is half width• Depends on equal split between source and drain• Is split equal?Ref: Bienstman et al, JSSC 12/1980, pp. 1051.Eichenberger et al,JSSC 8/1989, pp. 1143.EECS240 Lecture 22 13Charge Injection AnalysisB• Can perform more detailed, distributed analysis• See e.g. Wegmann et al, “Charge Injection in Analog MOS Switches,” IEEE J. Solid-state Circuits, Dec. 1987.• Results depend on how fast switch is turned off• Note that SPICE doesn’t do this (lumped model) – uses “XPART” parameter instead:• XPART = 0: Source 60%, Drain 40%• XPART = 0.5: equal split• XPART = 1: 100% DrainEECS240 Lecture 22 14Rejecting Injection ErrorEECS240 Lecture 22 15Bottom-Plate Sampling• Turn off Φ1afirst• Injected charge is constant• Removed in differential output• Switch Φ1bopens later• C2disconnectedÆ “zero” charge injected• Is this useful?• V2 = 0V…C2Φ1bΦ1aVinV2timeonofftimeonoffΦ1bΦ1aEECS240 Lecture 22 16Using Bottom-Plate SamplingEECS240 Lecture 22 17Using Bottom-Plate SamplingRef: W. Yang, D. Kelly, I. Mehr, M. T. Sayuk, and L. Singer, "A 3-V 340mW 14-b 75-Msample/s CMOS ADC with 85-dB SFDR at Nyquist input," IEEE Journal of Solid-State Circuits, vol. 36, pp. 1931 - 1936, December
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