EECS240 – Spring 2009Lecture 6: Noise Analysis TechniquesElad AlonDept. of EECSEECS240 Lecture 6 2Noise Variance in a Real Circuit:Sample and Hold• Noise on the capacitor:• So effective bandwidth is:()()22220141on BBoT onvf kTRsRCkTvvfdfC∞=+→= =∫4142BBokTkTR fCffRCπ∆=→∆ = =EECS240 Lecture 6 3SPICE VerificationEECS240 Lecture 6 4Energy-Based AnalysisEECS240 Lecture 6 5Useful Integrals2222021141oozzoosQdfssQωωωωωω∞+⎛⎞=+⎜⎟⎝⎠++∫20114oosdfωω∞=+∫222200221411oooo oosQdf dfss ssQQωωωω ωω∞∞==++ ++∫∫EECS240 Lecture 6 6CS Amplifier()FLBvoLBLmLBLLLmLBLLLmLBoTLLLmLBonnCTkACTkRgCTkCRRgRTkdfCsRRgRTkvCsRRgRTkfv=⎟⎠⎞⎜⎝⎛+=⎟⎠⎞⎜⎝⎛+=⎟⎟⎠⎞⎜⎜⎝⎛+=+⎟⎟⎠⎞⎜⎜⎝⎛+=+⎟⎟⎠⎞⎜⎜⎝⎛+=∫∞321321413214113214132142022222EECS240 Lecture 6 7Signal-To-Noise Ratio• SNR:• Signal Power (sinusoidal source):• Noise Power (assuming thermal noise dominates):• So:noisesigPPSNR =221peakzerosigVP−=fBnoisenCTkP =212zero peakfBCVSNRnkT−=4 ×↑CdBSNR 6 +↑EECS240 Lecture 6 8dB versus Bits• Quantization “noise”• Quantizer step size:• Box-car pdf variance:• SNR of N-Bit sinusoidal signal• Signal power• SNR• 6.02 dB per Bit122∆=QS∆22221⎟⎠⎞⎜⎝⎛∆=NsigP[]dB 02.676.125.12NSPSNRNQsig+=×==146249816508dBNEECS240 Lecture 6 9SNR versus Power• 1 Bit Æ 6dB Æ 4x SNR• 4x SNR Æ 4x C• Circuit bandwidth ~gm/C Æ 4x gm• Keeping V* constant Æ 4x ID, 4x W• Thermal noise limited circuit:• Each bit QUADRUPLES power!• Overdesign is expensive• Better do the analysis right!EECS240 Lecture 6 10Analog Circuit Dynamic Range• Biggest signal set by VDD. So, for (single-ended) sinusoid:• The noise is• So the dynamic range in dB is:221)(maxDDVrmsV =CTknrmsVBfn=)([pF] in C with[dB] 7520log[V/V] 8)()(10max+⎟⎟⎠⎞⎜⎜⎝⎛===fDDBfDDnnCVTknCVrmsVrmsVDREECS240 Lecture 6 11Analog Circuit Dynamic Range• Biggest swing set by supply voltage VDD• Modern ICs: VDD = ~1V, C < ~1nF (nf= 1)• DR < 100dB (~16 Bits)• PCB circuits with 30V and discrete C of ~100nF:• DR < 140dB (23 Bits)• A 40dB (~7 Bit) advantage!• Note: can break this barrier with oversampling 212DDfBCVSNRnkT=EECS240 Lecture 6 12Sampled Noise SpectrumSy(f)CRsw4kBTRswfs()CTkdffSfTCRTafTeefCTkfSrBysswaasrBysf∫====−+−=−−2022)(1 and T 2cos1112)(τπ0 0.1 0.2 0.3 0.4 0.5-4-3-2-101234Normalize d Fr equ ency f/ fsNormalized Noise Density S(f)/(2kT/C)T/τ = 1T/τ = 3• What if RC doesn’t completely settle every cycle?• Noise between samples correlated Æ spectrum not white• If T/τ > 3, correlation small• Sampled spectrum white• In practice usually the caseEECS240 Lecture 6 13Periodic Noise AnalysisPSS pss period=100n maxacfreq=1.5G errpreset=conservativePNOISE ( Vrc_hold 0 ) pnoise start=0 stop=20M lin=500 maxsideband=10ZOH1T = 100nsZOH1T = 100nsS1R100kOhmR100kOhmC1pFC1pFPNOISE Analysissweep from 0 to 20.01M (1037 steps)PNOISE1Netlistahdl_include "zoh.def"ahdl_include "zoh.def"Vclk100nsVrc Vrc_holdSampling Noise from SC S/HC11pFC11pFC11pFC11pFR1100kOhmR1100kOhmR1100kOhmR1100kOhmVoltage NOISEVNOISE1NetlistsimOptions options reltol=10u vabstol=1n iabstol=1psimOptions options reltol=10u vabstol=1n iabstol=1psimOptions options reltol=10u vabstol=1n iabstol=1psimOptions options reltol=10u vabstol=1n iabstol=1pSpectreRF PNOISE: checknoisetype=timedomainnoisetimepoints=[…]as alternative to ZOH.noiseskipcount=largemight speed up things in this case.EECS240 Lecture 6 14Two-Stage AmplifierEECS240 Lecture 6 15Input Equivalent NoiseEECS240 Lecture 6 16Equivalent Noise Generators• Model for noisy two-port:• Noiseless two-port • Plus equivalent input noise sources• In general, vnand inare correlated. • Ignore that for nowEECS240 Lecture 6 17Finding the Equivalent Generators• Find vnand inby opening and shorting the input• Shorted input: • Output noise due only to vn• Open input:• Output noise due only to inEECS240 Lecture 6 18Role of Source Resistance• If Rsis large:• Design amplifier with low in(MOS)• If Rsis low:• Design amplifier with low vn(BJT)• For a given Rs, there is an optimal vn/inratio• Alternatively, for a given amp, there is an optimal RsEECS240 Lecture 6 19Total Output NoiseEECS240 Lecture 6 20New Equivalent Generator• With known Rs, total noise can be lumped into one veqEECS240 Lecture 6 21Optimum Source Impedance• Can use this to optimize source impedance for minimum added noise from two-port (noise figure):24nnvRkT f≡∆24nniGkT f≡∆EECS240 Lecture 6 22Correlated Noise Sources• Partition ininto two components:• Correlated (“parallel”) to vn• Uncorrelated (“perpendicular”) to vnvniniciuEECS240 Lecture 6 23Correlated Noise Sources (cont.)Finding Yc:()()222222222222222221uscsnuscsnucsnnsneqiZYZviZiZviiZviZvv++=++=++=+={{22222222211 222222222 3 3222222222 2211 22ccnunniYviccnvviiiviYviviααβββαα==+=+==+EECS240 Lecture 6 24Equivalent Noise Voltage (cor)• Since the above expression is the sum of two uncorrelated noise voltages, we have• Now we can continue as before to