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CORNELL ECE 4760 - Study Notes

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FeaturesPin ConfigurationsDescriptionBlock DiagramPin DescriptionsVCCGNDPort A (PA7..PA0)Port B (PB7..PB0)Port C (PC7..PC0)Port D (PD7..PD0)RESETXTAL1XTAL2AVCCAREFAGNDClock OptionsInternal RC OscillatorCrystal OscillatorExternal ClockExternal RC OscillatorTimer OscillatorArchitectural OverviewThe General Purpose Register FileThe X-register, Y-register, And Z-registerThe ALU – Arithmetic Logic UnitThe In-System Self- programmable Flash Program MemoryThe SRAM Data MemoryThe Program and Data Addressing ModesRegister Direct, Single Register RdRegister Direct, Two Registers Rd And RrI/O DirectData DirectData Indirect With DisplacementData IndirectData Indirect With Pre- decrementData Indirect With Post- incrementConstant Addressing Using The LPM and SPM InstructionsIndirect Program Addressing, IJMP and ICALLRelative Program Addressing, RJMP and RCALLThe EEPROM Data MemoryMemory Access Times and Instruction Execution TimingI/O MemoryThe Status Register – SREGThe Stack Pointer – SPReset and Interrupt HandlingReset SourcesPower-on ResetExternal ResetBrown-out DetectionWatchdog ResetMCU Status Register – MCUSRInternal Voltage ReferenceVoltage Reference Enable Signals and Start-up TimeInterrupt HandlingInterrupt Response TimeThe General Interrupt Mask Register – GIMSKThe General Interrupt Flag Register – GIFRThe Timer/Counter Interrupt Mask Register – TIMSKThe Timer/Counter Interrupt Flag Register – TIFRExternal InterruptsMCU Control Register – MCUCRSleep ModesIdle ModeADC Noise Reduction ModePower-down ModePower-save ModeCalibrated Internal RC OscillatorOscillator Calibration Register – OSCCALSpecial Function I/O Register – SFIORTimer / CountersTimer/Counter Prescalers8-bit Timer/Counter0Timer/Counter0 Control Register – TCCR0Timer/Counter 0 – TCNT016-bit Timer/Counter1Timer/Counter1 Control Register A – TCCR1ATimer/Counter1 Control Register B – TCCR1BTimer/Counter1 – TCNT1H and TCNT1LTCNT1 Timer/Counter1 WriteTCNT1 Timer/Counter1 ReadTimer/Counter1 Output Compare Register – OCR1AH and OCR1ALTimer/Counter1 Output Compare Register – OCR1BH and OCR1BLTimer/Counter1 Input Capture Register – ICR1H and ICR1LTimer/Counter1 in PWM Mode8-bit Timer/Counter 2Timer/Counter2 Control Register – TCCR2Timer/Counter2 – TCNT2Timer/Counter2 Output Compare Register – OCR2Timer/Counter2 in PWM ModePWM Modes (Up/Down and Overflow)Asynchronous Status Register – ASSRAsynchronous Operation of Timer/Counter2Watchdog TimerThe Watchdog Timer Control Register – WDTCREEPROM Read/Write AccessThe EEPROM Address Register – EEARH and EEARLThe EEPROM Data Register – EEDRThe EEPROM Control Register – EECRPreventing EEPROM CorruptionSerial Peripheral Interface – SPISS Pin FunctionalityData ModesSPI Control Register – SPCRThe SPI Status Register – SPSRThe SPI Data Register – SPDRUARTData TransmissionData ReceptionMulti-processor Communication ModeUART ControlUART I/O Data Register – UDRUART Control and Status Register A – UCSRAUART Control and Status Register B – UCSRBBaud Rate GeneratorUART Baud Rate Registers – UBRR and UBRRHIDouble Speed TransmissionThe Baud Rate Generator in Double UART Speed Mode2-wire Serial Interface (Byte Oriented)The 2-wire Serial Interface Bit Rate Register – TWBRThe 2-wire Serial Interface Control Register – TWCRThe 2-wire Serial Interface Status Register – TWSRThe 2-wire Serial Interface Data Register – TWDRThe 2-wire Serial Interface (Slave) Address Register – TWAR2-wire Serial Interface ModesMaster Transmitter ModeMaster Receiver ModeSlave Receiver ModeSlave Transmitter ModeMiscellaneous StatesAssembly Code Example – Master Transmitter ModeAssembly Code Example - Master Receiver ModeAssembly Code Example – Slave Receiver ModeAssembly Code Example – Slave Transmitter ModeTWI Include FileThe Analog ComparatorThe Analog Comparator Control And Status Register – ACSRAnalog Comparator Multiplexed InputAnalog to Digital ConverterFeature ListOperationPrescaling and Conversion TimingADC Noise Canceler FunctionThe ADC Multiplexer Selection Register – ADMUXThe ADC Control and Status Register – ADCSRThe ADC Data Register – ADCL and ADCHScanning Multiple ChannelsADC Noise Canceling TechniquesI/O-PortsPort AThe Port A Data Register – PORTAThe Port A Data Direction Register – DDRAThe Port A Input Pins Address – PINAPORT A as General Digital I/OPORT A SchematicsPort BThe Port B Data Register – PORTBThe Port B Data Direction Register – DDRBThe Port B Input Pins Address – PINBPort B As General Digital I/OAlternate Functions Of PORTBPort B SchematicsPort CThe Port C Data Register – PORTCThe Port C Data Direction Register – DDRCThe Port C Input Pins Address – PINCPort C As General Digital I/OAlternate Functions of PORTCPort C SchematicsPort DThe Port D Data Register – PORTDThe Port D Data Direction Register – DDRDThe Port D Input Pins Address – PINDPort D As General Digital I/OAlternate Functions Of PORTDPort D SchematicsMemory ProgrammingBoot Loader SupportEntering the Boot Loader ProgramCapabilities of the Boot LoaderSelf-programming the FlashPerforming Page Erase by SPMFill the Temporary Buffer (Page Load)Perform a Page WriteConsideration while Updating the Boot Loader SectionWait for SPM Instruction to CompleteInstruction Word Read after Page Erase, Page Write, and Lock-bit WriteAvoid Reading the Application Section During Self- programmingBoot Loader Lock-bitsSetting the Boot Loader Lock Bits by SPMReading the Fuse and Lock Bits from SoftwareEEPROM Write Prevents Writing to SPMCRAddressing the Flash During Self-programmingStore Program Memory Control Register – SPMCRPreventing Flash CorruptionAssembly code example for a Boot LoaderProgram And Data Memory Lock BitsFuse BitsSignature BytesCalibration ByteParallel ProgrammingSignal NamesEnter Programming ModeChip EraseProgramming the FlashProgramming the EEPROMReading the FlashReading the EEPROMProgramming the Fuse Low BitsProgramming the Fuse High BitsProgramming the Lock BitsReading the Fuse and Lock BitsReading the Signature BytesReading the Calibration ByteParallel Programming CharacteristicsSerial DownloadingSerial Programming AlgorithmData Polling FlashData Polling EEPROMProgramming Times for Non- Volatile MemorySerial Programming CharacteristicsElectrical CharacteristicsAbsolute Maximum Ratings*DC CharacteristicsExternal Clock Drive WaveformsExternal Clock Drive2-wire Serial Interface CharacteristicsTypical CharacteristicsRegister


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