Principles of Computer Architecture Miles Murdocca and Vincent Heuring Chapter 6: Datapath and ControlChapter ContentsThe Fetch-Execute CycleHigh Level View of MicroarchitectureARC Instruction SubsetARC Instruction FormatsARC DatapathARC ALU OperationsBlock Diagram of ALUGate-Level Layout of Barrel ShifterTruth Table for (Most of the) ALU LUTsDesign of Register %r1Outputs to Control Unit from Register %irMicroarch-itecture of the ARCMicroword FormatSettings for the COND Field of the MicrowordDECODE Format for Microinstruction AddressTiming Relationships for the RegistersPartial ARC Micro-programPartial ARC Microprogram (cont’)Branch DecodingAssembled ARC MicroprogramAssembled ARC Microprogram (cont’)Example: Add the subcc InstructionBranch TableMicroprogramming vs. NanoprogrammingHardware Description LanguageCircuit Derived from HDLHDL for ARCHDL for ARC (cont’)HDL ARC CircuitHDL ARC Circuit (cont’)Case Study: The VHDL Hardware Description LanguageVHDL SpecificationVHDL Specification (cont’)VHDL Specification (cont’)6-1Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer OrganizationPrinciples of Computer ArchitectureMiles Murdocca and Vincent HeuringChapter 6: Datapath and Control6-2Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer OrganizationChapter Contents6.1 Basics of the Microarchitecture6.2 A Microarchitecture for the ARC6.3 Hardwired Control6.4 Case Study: The VHDL Hardware Description Language6-3Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer OrganizationThe Fetch-Execute Cycle• The steps that the control unit carries out in executing a program are:(1) Fetch the next instruction to be executed from memory.(2) Decode the opcode.(3) Read operand(s) from main memory, if any.(4) Execute the instruction and store results.(5) Go to step 1.6-4Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer OrganizationHigh Level View of Microarchitecture• The microarchitecture consists of the control unit and the programmer-visible registers, functional units such as the ALU, and any additional registers that may be required by the control unit.6-5Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer OrganizationARC Instruction Subset6-6Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer OrganizationARC Instruction Formats6-7Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer OrganizationARC Datapath6-8Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer OrganizationARC ALU Operations6-9Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer OrganizationBlock Diagram of ALU6-10Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer OrganizationGate-Level Layout of Barrel Shifter6-11Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer OrganizationTruth Table for (Most of the) ALU LUTs6-12Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer OrganizationDesign of Register %r16-13Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer OrganizationOutputs to Control Unit fromRegister %ir6-14Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer OrganizationMicroarch-itecture of the ARC6-15Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer OrganizationMicroword Format6-16Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer OrganizationSettings for the COND Field of the Microword6-17Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer OrganizationDECODE Format for Microinstruction Address6-18Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer OrganizationTiming Relationships for the Registers6-19Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer OrganizationPartial ARC Micro-program6-20Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer OrganizationPartial ARC Microprogram(cont’)6-21Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer OrganizationBranch Decoding• Decoding tree for branch instructions shows corresponding microprogramlines:6-22Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer OrganizationAssembled ARCMicroprogram6-23Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer OrganizationAssembled ARCMicroprogram(cont’)6-24Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer OrganizationExample: Add the subcc Instruction• Consider adding instruction subcc (subtract) to the ARC instruction set. subcc uses the Arithmetic format and op3 = 001100.6-25Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer OrganizationBranch Table• A branch table for trap handlers and interrupt service routines:6-26Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer OrganizationMicroprogramming vs. Nanoprogramming• (a) Micropro-gramming vs. (b) nano-programming.6-27Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer OrganizationHardware Description Language• HDL sequence for a resettablemodulo 4 counter.6-28Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer OrganizationCircuit Derived from HDL• Logic design for a modulo 4 counter described in HDL.6-29Chapter 6 - Datapath and ControlDepartment of Information Technology, Radford University ITEC 352 Computer