Goals: Understanding Structure/Function of Digital ComputerScales, Units, and ConventionsMachine/assembly Language Programmer’s ViewMachine and Assembly LanguageThe Fetch-Execute CycleAL Programmer’s World View: Instruction Set Architecture (ISA)Programmer’s Models of 4 commercial machinesMachine, Processor, and Memory StateHLL vs Assembly LanguageWho Uses Assembly LanguageAssembly Language Programming ToolsThe Computer Architect’s ViewThe Memory HierarchyLogic Designer’s ViewImplementation DomainsThree Different Implementation DomainsDistinction Btw. Classical Logic Design & Computer Logic DesignTwo Views of the CPU PC RegisterTools of the Logic Designer’s TradeSummaryComputer Systems Design & Architecture 2ndEdition © 2004 Prentice Hall, Mark Franklin Fall 06Goals: Understanding Structure/Function of Digital Computer Multiple levels of computer operation Application level High Level Language(s), HLL, level(s) Assembly/machine language level: instruction set System architecture level: subsystems & connections Digital logic level: gates, memory elements, buses Electronic design level Semiconductor physics level Interactions and relations between levels View of machine at each level Tasks and tools at each level Historical perspective Trends and research activitiesThiscourseThiscourseComputer Systems Design & Architecture 2ndEdition © 2004 Prentice Hall, Mark Franklin Fall 06Scales, Units, and ConventionsTermK (kilo-)M (mega-)G (giga-)T (tera-)1031061091012210= 1024220= 1,048,576230= 1,073,741,824240= 1,099,511,627,776Normal Usage As a power of 2TermUsagem (milli-)μ(micro-)n (nano-)p (pico-)10-310-610-910-12bits/register filebytes/memorybytes/diskbytes/disk arraydisk latency (ms)off-chip memory access (µs)on-chip clock period (ns)Units: Bit (b), Byte (B), Nibble, Word (w), Double Word, Long WordSecond (s), Hertz (Hz)Exp: MemoriesExp: Timinggate delay (ps) (e.g.,100ps)Computer Systems Design & Architecture 2ndEdition © 2004 Prentice Hall, Mark Franklin Fall 06Machine/assembly Language Programmer’s View Machine language: Set of fundamental instructions the machine can execute A pattern of 1’s and 0’s Assembly language: Alphanumeric equivalent of machine language Mnemonics more human oriented than 1’s and 0’s Assembler: A program that translates assembly to machine language Computer’s native language is assembly/machine languageComputer Systems Design & Architecture 2ndEdition © 2004 Prentice Hall, Mark Franklin Fall 06Machine and Assembly LanguageTwo Motorola MC68000 instructionsMC68000 Assembly Language Machine Language0011 101 000 000 100ADDI.W #9, D200000110 01 000 0100000 0000 0000 1001MOVE.W D4, D5Op code Data reg. #5 Data reg. #4add opcode 16b Reg 2ASSEMBLERAssembly Language ProgramMachine Language ProgramSize of imm. dataImm. dataMode (reg#,+1,-1)Computer Systems Design & Architecture 2ndEdition © 2004 Prentice Hall, Mark Franklin Fall 06The Fetch-Execute CycleProgram CounterInstruction RegisterRegister FileComputer Systems Design & Architecture 2ndEdition © 2004 Prentice Hall, Mark Franklin Fall 06AL Programmer’s World View:Instruction Set Architecture (ISA) Instruction set: the collection of all machine operations. Programmer’s View: sees set of instructions, along with the machine resources manipulated by them. ISA includes  instruction set,  memory, and  programmer accessible registers of the system. There may be memory or other resources used to implement some functions that are not part of ISA and are thus: “Non Programmer Accessible.”Computer Systems Design & Architecture 2ndEdition © 2004 Prentice Hall, Mark Franklin Fall 06Programmer’s Models of 4 commercial machinesComputer Systems Design & Architecture 2ndEdition © 2004 Prentice Hall, Mark Franklin Fall 06Machine, Processor, and Memory State The Machine State: contents of all registers in system, accessible to programmer or not. The Processor State: registers internal to the CPU. The Memory State: register contents in memory system. “State” is used in the formal finite state machine sense Maintaining/restoring machine & processor state:Important to many operations, especially procedure calls & interrupts.Computer Systems Design & Architecture 2ndEdition © 2004 Prentice Hall, Mark Franklin Fall 06HLL vs Assembly LanguageWhat capabilities are present/not present in HLL versus AL ?Under what circumstances will you choose one or the other ?Computer Systems Design & Architecture 2ndEdition © 2004 Prentice Hall, Mark Franklin Fall 06Who Uses Assembly Language The machine designer must implement and trade-off instruction functionality The compiler writer must generate machine language from a HLL Applications where performance (time, space) is critical.  Special purpose or embedded processor programmers Special functions and heavy dependence on unique I/O devices canmake HLL’s uselessComputer Systems Design & Architecture 2ndEdition © 2004 Prentice Hall, Mark Franklin Fall 06Assembly Language Programming Tools The assembler The linker The debugger or monitor The development systemComputer Systems Design & Architecture 2ndEdition © 2004 Prentice Hall, Mark Franklin Fall 06The Computer Architect’s View Architect: Concerned with design, performance & cost. ISA designed for optimum programming utility (best instruction set) & performance of implementation. To see goals are met architect uses: performance measurement tools (e.g., benchmark programs), simulation tools (e.g., SimpleScalar) analytic modeling tools (e.g., Queuing Theory) Balances performance of building blocks such as CPU, memory, I/O devices, and interconnections.Computer Systems Design & Architecture 2ndEdition © 2004 Prentice Hall, Mark Franklin Fall 06The Memory Hierarchy Modern computers have a hierarchy of memories Allows tradeoffs of speed/cost/volatility/size, etc. CPU sees common view of levels of the hierarchy.CPUCacheMemoryMain Memory Disk MemoryTapeMemorySingle ChipLevel 1 CacheLevel 2 CacheSRAM or DRAM (Static/Dynamic Random Access Memory)KEY CONCEPT: Principal of LocalityComputer Systems Design & Architecture 2ndEdition © 2004 Prentice Hall, Mark Franklin Fall 06Logic Designer’s View Designs the machine at the logic gate level The design determines whether the architect meets cost and performance goals