Slide Number 1IO TechnologyEarly Chip-to-Chip Interface StandardsPerformance Criteria for IO TechnologiesI/O Signal TypesSingle Ended SignalingSingle Ended Signaling: AdvantagesSingle Ended Signaling: DisadvantagesSingle-Ended Standards Summary Differential SignalingDifferential SignalingWhy differential signaling?Differential Signaling AdvantagesDifferential Signaling DisadvantagesData Transmission TopologiesVoltage Referenced SignalingWhy Voltage Referenced Signaling?Slide Number 18Slide Number 19Gunning Transceiver Logic Plus Differential Signaling TypesLow Voltage Differential Signaling: LVDSLow Voltage Differential Signaling: LVDSExternal Bus versus Internal BusUSB (Universal Serial Bus)USBSlide Number 27Eye DiagramCreating eye diagramOpen EyeClosed EyeWhat is Synchronous?What is Source-synchronous? Clock RecoveryHyperTransport Differential StandardHyperTransport ClockingFPGA Signaling SupportSlide Number 38Slide Number 39Double Data Rate SupportSlide Number 41Slide Number 42GND BounceChip-to-Chip Interface Standards (Cont’d)Backplane Interface StandardsMemory Interface StandardsDepartment of Electrical and Computer EngineeringMississippi State UniversitySherif Abdelwahed IO TechnologyComputer Aided Digital Systems Design - EE 4743/6743IO Technology Input/Output (IO) has become very complex¾ Used to only have to worry about TTL vs. CMOS¾ TTL had current drive requirements, CMOS just voltage level requirements¾ Both used full swing signals (0 to Vdd, used to be 5 V) New issues in IO technology¾ Limit voltage swing to speed up signaling ¾ Voltage swing about a reference voltage instead of between 0 and Vdd¾ Differential signaling to reject noise¾ Termination required to prevent signal reflections from corrupting signalsEarly Chip-to-Chip Interface Standards5-V CMOS0 GNDVOHVOLVIHVILVCC5V4.44V3.5V1.5V0.5VVT2.5VETL2.4V1.6V1.4V0.4V0 GNDVOHVOLVIHVILVCC5VVT1.5V5-V TTL2.4V2.0V0.8V0.4V1.5V0 GNDVOHVOLVIHVILVCC5VVTETL: Enhanced transceiver logicPerformance Criteria for IO Technologies IO Technologies are compared based on ¾ Power consumption¾ Noise immunity margin (NIM)¾ Capacitive loading¾ Speed¾ Packaging High voltage swing is undesirable ¾ Greater power consumption¾ Higher transient (switching) noise ¾ Higher electromagnetic (EM) interferenceI/O Signal TypesLVCMOS HSTL SSTLSingle-EndedLVDS Bus LVDS LVPECLDifferentialI/O Signal TypeLVTTLNOTE: Only the most popular IO types shown hereLVTTL input levels1.2V swingLogic HighLogic Low0.8 V2 V3.3 VSingle Ended Signaling Traditional means of data transfer Data is carried on a single line Bigger voltage swing between logic Low and HighSingle Ended Signaling: Advantages Simplicity and low cost of implementation.  Single-ended system requires only one line per signal ¾ Ideal for cabling, when connector costs are more important than the data transfer rate¾ Example PC, parallel printer port or serial communication with many handshaking lines Cabling costs can be kept to a minimum with short distance communication  For longer distances and/or noisy environments, shielding and additional ground lines are essential.  Twisted-pair cables are recommended for line lengths of more than 1 meter.Single Ended Signaling: Disadvantages Single ended signal subject several means of distortions and noise.¾ Ground or reference may move due to switching currents. This is called simultaneous switching output or SSO noise. These cause undesired transient behavior among output drivers, input receivers, or internal logic.¾ A single ended receiver only cares about a voltage that is referenced to its own ground.¾ Electromagnetic (EM) interference can impose voltage on a single ended signal.¾ Signal passing from one board to another are subject to the local ground disturbance. We can counteract many of these effect by adding more ground.  As frequencies increase beyond 1GHz, 80% of the signal will be lost.Single-Ended Standards SummaryLVDS Input levels0.4V swing1.3 V1.7 V3.3 VDifferential Signaling Latest means of data transfer Differential signaling uses two conductors:¾ The transmitter translates the single input signal into a pair of outputs that are driven 180° out of phase.¾ The receiver, a differential amplifier, recovers the signal as the difference in the voltages on the two lines.¾ Voltage difference determines logic High or LowDifferential Signaling Differential: two pairs of wires used to send a ‘1’ or ‘0’ ¾ when D0+ > D0-, then a ‘1’ level. ¾ when D0+ < D0-, then a ‘0’ level. ¾ typical differences in are in the few hundred millivolts.The twisted-pair cable used in these interfaces, in combination with a correct line termination to avoid line reflections, allows very high data rates. Signaling rates of up to 10 Gbs are possible with differential signaling.Why differential signaling?+-~D+~D-Vo = (D+) - (D-)+-~D+~D-~Vcm~VcmVo = (Vcm + D+) - (Vcm+ D-)= (D+) - (D-) Very good at rejecting common-mode noise. If noise is coupled into a cable, then usually it is coupled into all wires in the cable This ‘common-mode’ noise (Vcm) can be rejected by input amplifierDifferential Signaling Advantages Differential Signaling is not sensitive to SSO noise. A differential receiver is tolerant of its ground moving around. If each “wire” of pair is on close proximity of one and other, electromagnetic interference imposes the same voltage on both signals. The difference cancels out the effect. Since the AC currents in the “wires” are equal but opposite and proximal, radiated EMI is reduced. Signals passing from one board to another are not subject to the local ground disturbances. As frequencies increase beyond 1GHz, up to 80% of the signal may be lost, but difference still crosses 0 volts.¾ There are still loss issues for differential signaling but only come into play in high loss system. Most single ended systems assume approximately 15% channel loss.Differential Signaling Disadvantages The cost is doubling the signal wires, but this may not be so bad as compared to adding grounds or shields to improve single ended signaling.  Routing constraint: Pair signals need to be routed together. Differential signal have certain symmetry requirements that may pose routing challenges.Data Transmission Topologies Point to point¾ one transmitter and one receiver per line¾ Unidirectional Multidrop (Distributed Simplex)¾