MACHINE LEVEL PROGRAMMING II ARITHMETIC CONTROL University of Texas at Austin Today Complete addressing mode address computation leal Arithmetic operations Control Condition codes Conditional branches While loops 2 University of Texas at Austin Complete Memory Addressing Modes Most General Form D Rb Ri S Mem Reg Rb S Reg Ri D D Constant displacement 1 2 or 4 bytes Rb Base register Any of 8 integer registers Ri Index register Any except for esp Unlikely you d use ebp either S Scale 1 2 4 or 8 why these numbers Special Cases Rb Ri Mem Reg Rb Reg Ri D Rb Ri Mem Reg Rb Reg Ri D Rb Ri S Mem Reg Rb S Reg Ri 3 University of Texas at Austin Address Computation Examples edx 0xf000 ecx 0x0100 Expression Address Computation Address 0x8 edx 0xf000 0x8 0xf008 edx ecx 0xf000 0x100 0xf100 edx ecx 4 0xf000 4 0x100 0xf400 0x80 edx 2 2 0xf000 0x80 0x1e080 4 University of Texas at Austin Address Computation Instruction leal Src Dest Src is address mode expression Set Dest to address denoted by expression Uses Computing addresses without a memory reference E g translation of p x i Computing arithmetic expressions of the form x k y k 1 2 4 or 8 Example int mul12 int int mul12 int x x return return x 12 x 12 Converted to ASM by compiler leal leal sall sall eax eax 2 eax eax 2 eax eax 2 2 eax eax t t x x 2 x x 2 return return t 2 t 2 5 University of Texas at Austin Today Complete addressing mode address computation leal Arithmetic operations Control Condition codes Conditional branches While loops 6 University of Texas at Austin Some Arithmetic Operations Two Operand Instructions Format Computation addl Src Dest subl Src Dest imull Src Dest sall Src Dest sarl Src Dest shrl Src Dest xorl Src Dest andl Src Dest orl Src Dest Dest Dest Dest Dest Dest Dest Dest Dest Dest Dest Dest Dest Dest Dest Dest Dest Dest Dest Src Src Src Src Also called shll Src Arithmetic Src Logical Src Src Src Watch out for argument order No distinction between signed and unsigned int why 7 University of Texas at Austin Some Arithmetic Operations One Operand Instructions incl decl negl notl Dest Dest Dest Dest Dest Dest Dest Dest Dest 1 Dest 1 Dest Dest See book for more instructions 8 University of Texas at Austin Arithmetic Expression Example arith pushl ebp esp ebp int int arith int arith int x x int int y y int int z z movl movl 8 ebp ecx int int t1 t1 x y x y movl 12 ebp edx int int t2 t2 z t1 z t1 leal edx edx 2 eax int int t3 t3 x 4 x 4 sall 4 eax int int t4 t4 y y 48 48 leal 4 ecx eax eax int int t5 t5 t3 t3 t4 t4 addl ecx edx int int rval rval t2 t2 t5 t5 addl 16 ebp edx return return rval rval imull edx eax popl ret Set Up Body ebp Finish 9 University of Texas at Austin Understanding arith int int arith int arith int x x int int y y int int z z int int t1 t1 x y x y int int t2 t2 z t1 z t1 int int t3 t3 x 4 x 4 int int t4 t4 y y 48 48 int int t5 t5 t3 t3 t4 t4 int int rval rval t2 t2 t5 t5 return return rval rval movl movl leal sall leal addl addl imull 8 ebp ecx 12 ebp edx edx edx 2 eax 4 eax 4 ecx eax eax ecx edx 16 ebp edx edx eax Offset 16 z 12 y 8 x 4 Rtn Addr 0 Old ebp ebp 10 University of Texas at Austin Understanding arith Stack int int arith int arith int x x int int y y int int z z int int t1 t1 x y x y int int t2 t2 z t1 z t1 int int t3 t3 x 4 x 4 int int t4 t4 y y 48 48 int int t5 t5 t3 t3 t4 t4 int int rval rval t2 t2 t5 t5 return return rval rval movl movl leal sall leal addl addl imull 8 ebp ecx 12 ebp edx edx edx 2 eax 4 eax 4 ecx eax eax ecx edx 16 ebp edx edx eax Offset ecx edx eax eax eax edx edx eax 16 z 12 y 8 x 4 Rtn Addr 0 Old ebp x y y 3 16 t4 t4 x 4 t5 x y t1 z t2 t2 t5 rval ebp 11 University of Texas at Austin Observations about arith Instructions in different order from C code Some expressions require multiple instructions Some instructions cover multiple expressions Get exact same code when compile x y z x 4 48 y int int arith int arith int x x int int y y int int z z int int t1 t1 x y x y int int t2 t2 z t1 z t1 int int t3 t3 x 4 x 4 int int t4 t4 y y 48 48 int int t5 t5 t3 t3 t4 t4 int int rval rval t2 t2 t5 t5 return return rval rval movl movl leal sall leal addl addl imull 8 ebp ecx 12 ebp edx edx edx 2 eax 4 eax 4 ecx eax eax ecx edx 16 ebp edx edx eax ecx edx eax eax eax edx edx eax x y y 3 16 t4 t4 x 4 t5 x y t1 z t2 t2 t5 rval 12 University of Texas at Austin Another Example logical pushl ebp movl esp ebp int int logical int logical int x x int int y y int int t1 t1 x y x y int int t2 t2 t1 t1 17 17 int int mask mask 1 13 1 13 7 7 int int rval rval t2 t2 mask mask return return rval rval movl xorl sarl andl 12 ebp eax 8 ebp eax 17 eax 8185 eax movl xorl sarl andl 12 ebp eax 8 ebp eax 17 eax 8185 eax popl ebp ret eax eax eax eax Set Up Body Finish y x y t1 t1 17 t2 t2 mask rval 13 University of Texas at Austin Another Example logical pushl ebp movl esp ebp int int logical int logical int x x int int y y int int t1 t1 x y x y int int t2 t2 t1 t1 17 17 int int mask mask 1 13 1 13 7 7 int int rval rval t2 t2 mask mask return return rval rval movl xorl sarl andl 12 ebp eax 8 ebp eax 17 eax 8185 eax movl xorl sarl andl 12 ebp eax 8 ebp eax 17 eax 8185 eax popl ebp ret eax eax eax eax Set Up Body Finish y x y t1 t1 17 t2 t2 mask rval 14 University of Texas at Austin Another Example logical pushl ebp movl esp ebp int int …