EE345L Spring 2006 May 10, 2006, 2-5pm Page 1 of 8 Jonathan W. Valvano You can use the textbook, but no other materials. You must put your answers in the boxes on the answer pages. You have 3 hours, so please allocate your time accordingly. Please read the entire quiz before starting. (4) Problem 1. Consider the following input capture interrupting system with its corresponding assembly code generated by the Metrowerks compiler. Assume at the time of the first instruction of main, there are exactly four (4) bytes pushed on the stack. In other words, after main executes BCLR, there will be 4 bytes on the stack. Calculate the maximum number of bytes that will be pushed on the stack at any given point as this system executes. This is all the software. The listing includes absolute addresses. The falling edge inputs on PT3 and PT2 can occur at any time, including at the same time. void main(void) { DDRT &=~0x0C; // PT3,PT2 are inputs TSCR1 = 0x80; // enable TCNT TIOS &= ~0x0C; // PT3-2 input capture TCTL4 = 0xA0; // falling edge TIE |= 0x0C; // Arm IC3, IC2 asm cli // enable for(;;) { } } interrupt 11 void IC3Han(void){ unsigned short static Count; TFLG1 = 0x08; // acknowledge Count++; } interrupt 10 void IC2Han(void){ unsigned short static Count; TFLG1 = 0x04; // acknowledge Count++; } main 4200 1d02420c BCLR _DDRT,#12 4204 c680 LDAB #128 4206 5b46 STAB _TSCR1 4208 4d400c BCLR _TIOS,#12 420b 86a0 LDAA #160 420d 5a4b STAA _TCTL4 420f 4c4c0c BSET _TIE,#12 4212 10ef CLI 4214 20fe BRA *+0 IC3Han 4216 c608 LDAB #8 4218 5b4e STAB _TFLG1 421a fe3800 LDX Count.1 421d 08 INX 421e 7e3800 STX Count.1 4221 0b RTI IC2Han 4222 c604 LDAB #4 4224 5b4e STAB _TFLG1 4226 fe3802 LDX Count.2 4229 08 INX 422a 7e3802 STX Count.2 422d 0b RTI (4) Problem 2. Consider this Heap_Release function, which is part of a dynamic memory manager. The function exists at ROM locations $4110 to $411C, and the 16-bit FreePt is allocated in RAM at location $3852. unsigned short static Heap[SIZE*NUM]; unsigned short static *FreePt; void Heap_Release(unsigned short *pt){ unsigned short *oldFreePt; oldFreePt = FreePt; FreePt = pt; *pt = (unsigned short)oldFreePt; } Heap_Release 4110 3b PSHD 4111 fc3852 LDD FreePt 4114 ee80 LDX 0,SP 4116 7e3852 STX FreePt 4119 6c00 STD 0,X 411b 3a PULD 411c 3d RTS Is there a critical section in the Heap_Release function? If so, specify the exact range of 16-bit hexadecimal addresses between which the critical section exists. For example, if you say there is a critical section between $4110 and $4114, then you are specifying an interrupt occurring between the PSHD and LDD instructions or between the LDD and LDX instructions could result in a corrupt heap, but interrupts occurring at other places in the function will be ok.EE345L Spring 2006 May 10, 2006, 2-5pm Page 2 of 8 (8) Question 3. Consider the situation in which the output of one digital circuit is connected to the input of another digital circuit. The difficulty arises because the two digital circuits are built with different logic families (e.g., 74LS, 74HC, 74S, etc.) There are no other connections on this signal, i.e., one output is tied to one input. The output specifications of the first circuit are VOH, VOL, IOH and IOL. The input specifications of the second circuit are VIH, VIL, IIH and IIL. These are the specifications, like you would find in a data sheet, not actual measurements of voltage and current like you would measure in lab with a DVM. In order for this system to operate properly, choose the proper specifications. First Digital Circuit Second Digital Circuit (2) Part a) Consider the voltage when the digital signal is high. Which of these specifications must be satisfied? A) VOH ≥ VIH B) VOH = VIH C) VOH ≤ VIH D) It doesn’t matter (2) Part b) Consider the voltage when the digital signal is low. Which of these specifications must be satisfied? A) VOL ≥ VIL B) VOL = VIL C) VOL| ≤ VIL D) It doesn’t matter (2) Part c) Consider the current when the digital signal is high. Which of these specifications must be satisfied? A) |IOH| ≥ |IIH| B) |IOH| = |IIH| C) |IOH| ≤ |IIH| D) It doesn’t matter (2) Part d) Consider the current when the digital signal is low. Which of these specifications must be satisfied? A) |IOL| ≥ |IIL| B) |IOL| = |IIL| C) |IOL| ≤ |IIL| D) It doesn’t matter (4) Question 4. Why do we define I/O ports like TCNT as volatile? Choose A-F. A) It is 16 bits wide. B) It needs to be permanently allocated. C) It is public. D) It changes value by means other than the direct action of the software. E) It is private. F) The software is not allowed to change its value. (4) Question 5. What purpose might there be to use the PLL and slow down the 6812? A) The system is CPU bound B) To make the batteries last longer on a battery-powered system C) In order to adjust the interrupt period when using RTI interrupts to a convenient value D) In order to balance the load between foreground and background threads E) To reduce latency F) None of the above, because there is never a reason to run slowerEE345L Spring 2006 May 10, 2006, 2-5pm Page 3 of 8 (4) Question 6. Consider the situation in which a FIFO queue is used to buffer data between a main program (e.g., SCI_OutChar that calls TxFifo_Put) and an output interrupt service routine (e.g., SCIhandler that calls TxFifo_Get and writes to SCIDRL). Experimental observations show this FIFO is usually empty, and at most 3 elements. What does it mean? Choose A-F. A) The system is I/O bound B) Bandwidth could be increased by increasing FIFO size C) The system is CPU bound D) The FIFO could be replaced by a global variable E) The latency is small and bounded F) Interrupts are not needed in this system (4) Question 7. Consider the situation in which the interrupt-driven SCI device is used for debugging purposes. In other words, the basic system operation does not require SCI output, but the programmer adds calls to SCI_OutUDec in order to