EE345L Spring 2008 Final Page 1 of 10 Jonathan W. Valvano First:_________________ Last:_____________________ This is the closed book section. You must put your answers in the boxes on this answer page. When you are done, you turn in the closed-book part and can start the open book part. Addr Bit 7 6 5 4 3 2 1 Bit 0 Name $00C8 BTST BSPL BRLD SBR12 SBR11 SBR10 SBR9 SBR8 SCIBD $00C9 SBR7 SBR6 SBR5 SBR4 SBR3 SBR2 SBR1 SBR0 $00CB TIE TCIE RIE ILIE TE RE RWU SBK SCICR2 $00CC TDRE TC RDRF IDLE OR NF FE PF SCISR1 $00CF R7T7 R6T6 R5T5 R4T4 R3T3 R2T2 R1T1 R0T0 SCIDRL (4) Question 1. Write a C function that outputs (transmits) one byte using the SCI port. You may assume the SCI is already initialized. Use busy-wait synchronization. (4) Question 2. Give an example C code that has a dropout error. (4) Question 3. Consider the situation in which the output of one digital circuit is connected to the input of another digital circuit. There are no other connections on this signal, i.e., one output is tied to one input. The output specifications of the first circuit are VOH, VOL, IOH and IOL. The input specifications of the second circuit are VIH, VIL, IIH and IIL. These are the specifications, like you would find in a data sheet, not actual measurements of voltage and current like you would measure in lab with a DVM. Give the four inequalities relating these eight parameters that must be true in order for the interface to operate properly. VOH VIH IOH IIH VOL VIL IOL IIL First Digital Circuit Second Digital CircuitEE345L Spring 2008 Final Page 2 of 10 Address Bit 7 6 5 4 3 2 1 Bit 0 Name $00D8 SPIE SPE SPTIE MSTR CPOL CPHA SSOE LSBF SPICR1 $00D9 0 0 0 MODFEN BIDIROE 0 SPISWAI SPC0 SPICR2 $00DA 0 0 0 0 0 SPR2 SPR1 SPR0 SPIBR $00DB SPIF 0 SPTEF MODF 0 0 0 0 SPISR $00DD Bit 7 6 5 4 3 2 1 Bit 0 SPIDR (4) Question 4. Write a C function that outputs (transmits) one byte using the SPI port. You may assume the SPI is already initialized. Don’t worry about SS. Use busy-wait synchronization. (4) Question 5. A software system needs to store a non-integer value. The parameter can be any value from -100.000 to +100.000 with a resolution of 0.001. What C data type do you need to define the integer portion of the fixed-point number? (4) Question 6. Consider a real-time system that samples an ADC. The goal is to implement a sampling frequency of fs. Let ti be the actual time sample i is taken. Give a mathematical equation, defining sampling jitter, δt in terms of fs ti-1 and ti.EE345L Spring 2008 Final Page 3 of 10 (8) Question 7. The SPI ports of two 9S12s are connected with a VERY long cable. We will model this cable as a single resistor in series with a capacitor, as shown in the figure below. VinRVoutTransmitter ReceiverC10Ω100nF For this question, assume an ideal transmitter (output impedance of 0) and an ideal receiver (input impedance of infinity). Let R=10Ω, and C=100nF. Note that R*C is 1μs. Consider a 5V 100ns pulse on the output of the transmitter (labeled as Vin ) (as might occur with a 5 Mbps SPI transmission) Vintime500 100ns Derive an equation for Vout as a function of time for the first 100 ns. Show your work and plug in values for R*C is 1μs. \EE345L Spring 2008 Final Page 4 of 10 (4) Question 8. This is a performance debugging question. The debugging instrument needs to be minimally intrusive. Assume x is an unsigned 16-bit variable in a real-time system. The goal is to collect information about what the values of x are and at what times x was those values. The SCI, PTT and PTAD are unused by the system, and PTT and PTAD are digital outputs. The debugging code will be placed at strategic places in the system. SCI_OutUDec outputs a 16-bit unsigned integer. BufX and BufT are 16-bit global buffers of length 100, n is a global variable initialized to 0. Which debugging code would you add to verify the correctness of this system? Circle your answer A) if(n<100){BufT[n]= TCNT; BufX[n]=x; n++;} B) PTT=TCNT; PTAD=x; C) SCI_OutUDec(TCNT); SCI_OutUDec(x); // busy-wait D) SCI_OutUDec(TCNT); SCI_OutUDec(x); // interrupt driven E) PTT |= 0x01; // at beginning PTT &= ~0x01; // at end F) if(n<100){BufX[n]= x; n++;} (4) Question 9. List three rationalizations (faulty justifications) an engineer might have for being unethical. I.e., why would an engineer be unethical? 1 2 3 For one of these rationalizations, explain how the rationalization is flawed. end of closed book sectionEE345L Spring 2008 Final Page 5 of 10 Jonathan W. Valvano First:_________________ Last:_____________________ Open book, open notes, calculator (no laptops, phones, devices with screens larger than a TI-89 calculator, devices with wireless communication). You must put your answers on pages 5 to 10. Please don’t turn in any extra sheets. (10) Question 10. The goal of this question is to interface a DC motor. PT0 controls the On/Off and PT1 controls the direction of rotation. The software will output a digital low on PT0 to deactivate the motor (current = 0). The software will output (PT1=0, PT0=1) to spin in one direction and it will output (PT1=1, PT0=1) to spin in the other direction. To activate the motor you must deliver about 5V to the motor coil. The maximum current of the coil is 500 mA (at maximum torque) and its inductance is 0.001 mH. Show the circuit diagram that interfaces PT1, PT0 to the motor. There are two power supplies to choose from +5V and +12V. Give part numbers and resistor values. +5VDC motor9S12PT1PT0+12VEE345L Spring 2008 Final Page 6 of 10 (15) Question 11. Interface the following 32K ROM to a 6811 running at 1 MHz. Assume the gate delay through each 74HC digital logic gate is [10ns min, 20ns max]. CE is negative logic. Assume there is no internal EEPROM or boot loader at BFxx. The full address decoder should select addresses $8000 to $FFFF. The ROM timing is described in the following figure: CEA14-A0D7-D010ns10ns[60,120ns][60,120ns]74HC0074HC0874HC0574HC0474HC10 Part a) Design the interface between the ROM to the 6811. You are limited to the digital devices shown on this page (you can use more than one copy if you want) LED74HC573Q888CEA14-A8A7-A0D7-D0ROM8786811A15R/WA14-A8ASAD7-AD07E Part b) Since the E clock period is 1000 ns, the