Interrupt-Driven Serial CommunicationIn these notes . . .Interrupt Design GuidelinesExample Interrupt MapInterrupt Performance ExaminationSerial Communications and InterruptsEnabling and Connecting Interrupts to ISRsCode to Implement QueuesDefining the QueuesInitialization and Status InquiriesEnqueue and DequeueNow the ISRsReceive Interrupt ExampleTransmit Interrupt ExampleTying Things TogetherAnother Example12-1Embedded SystemsInterrupt-Driven Serial CommunicationLecture 12Embedded Systems 12-2In these notes . . . Interrupt design guidelinesInterrupt-driven serial I/O device driver design–Interrupt map for system–Enabling interrupts–Queue concepts and implementationEmbedded Systems 12-3Interrupt Design Guidelines(Ganssle, p. 57)Create and Maintain an Interrupt Map–Make a spreadsheet showing interrupts for system, maximum rate, maximum latency allowed. Fill in with execution time measurements during development.–This provides a CPU time budget to follow, and lets us predict worst-case values:•CPU utilization from interrupts•Time interrupts are disabledKeep ISRs short. Leave lengthy work to task code when possible. E.g. converting time ticks to H:M:SKeep ISRs so trivially simple that bugs are rare.Fill all unused interrupt vectors with a pointer to a debug routine which hangs and flashes a light. This way you’ll find out about unplanned interrupts immediately.Embedded Systems 12-4Example Interrupt MapInterrupt Maximum LatencyMaximum FrequencyMaximumDurationActivity DescriptionUART 0 Receiveone character time = 1/1920 = 520.8 s19200 Hz/10 = 1920 Hzfill in as we develop codeEnqueue received characterUART 0 TransmitNone, but performance degrades19200 Hz/10 = 1920 Hzfill in as we develop codeDequeue and send outgoing characterTimer Overflow1 clock tick = 41 ns24 MHz/65536 = 366.2 Hzfill in as we develop codeIncrement timer extension tchiUART 1 Receiveone character timebaud rate/10UART 1 TransmitNone, but performance degradesbaud rate/10Embedded Systems 12-5Interrupt Performance ExaminationMeasurement–Use scope to measure duration of tx_isr, rx_isr by examining output bits–Set scope to “infinite persistence” to capture all events–Could also use get_ticks to automate data captureAnalysis–How long do the ISRs last?–Is there any variation? If so, why?–How long is the delay between receiving a character and sending out the reply?Performance Prediction–Max. CPU loading from interrupt = max. interrupt frequency * worst-case ISR duration–Min. period between interrupts = 1/max. frequency (if periodic, otherwise need to find minimum interarrival period)–Add up all ISRs which could be requested simultaneously (critical instant). These delay system response.–Overrun risk: CPU doesn’t finish current ISR before another interrupt of the same type occurs–Deadline risk: CPU doesn’t start an ISR before reaching its deadline.If we use a spreadsheet…Embedded Systems 12-6Serial Communications and InterruptsNow we have three separate threads of control in the program–main program (and subroutines it calls)–Transmit ISR – executes when UART is ready to send another character–Receive ISR – executes when UART receives a characterNeed a way of buffering information between threads–Solution: circular queue with head and tail pointers–One for tx, one for rxUARTtx_isrrx_isrget_string send_stringMain Program orother threadsEmbedded Systems 12-7Enabling and Connecting Interrupts to ISRsNeed to enable UART’s interrupts: send and receivePage 49: lists many interrupt sources, but nothing says UART!Investigate sfr62p.h instead, search for UART–sxtic and sxric (x = 0, 1, 2) are the interrupt registers for serial communications (UART 0, 1 and 2)Set their priorities to >0 to enable themCreate shells for ISRs, fill in laterDon’t forget to modify interrupt vectors 17 and 18 in sect30.inc to point to u0_tx_isr and u0_rx_isrinit_UART0() {…// code deleted for claritys0ric = 5; // enable UART 0// receive interrupt with// priority 5s0tic = 4; // enable UART 0// transmit interrupt with// priority 4…}#pragma INTERRUPT u0_tx_isrvoid u0_tx_isr() {// add code here!}#pragma INTERRUPT u0_rx_isrvoid u0_rx_isr() {// add code here!}Embedded Systems 12-8Code to Implement QueuesEnqueue at tail (tail_ptr points to next free entry), dequeue from head (head_ptr points to item to remove)#define the queue size to make it easy to changeOne queue per direction–tx ISR unloads tx_q–rx ISR loads rx_qOther threads (e.g. main) load tx_q and unload rx_qNeed to wrap pointer at end of buffer to make it circular, use % (modulus, remainder) operatorQueue is empty if size == 0Queue is full if size == Q_SIZEtailheadolder datanewer dataUARTtx_isrrx_isrget_stringsend_stringEmbedded Systems 12-9Defining the Queues#define Q_SIZE (32)typedef struct { unsigned char Data[Q_SIZE]; unsigned int Head; // points to oldest data element unsigned int Tail; // points to next free space unsigned int Size; // quantity of elements in queue} Q_T;Q_T tx_q, rx_q;Embedded Systems 12-10Initialization and Status Inquiriesvoid Q_Init(Q_T * q) { unsigned int i; for (i=0; i<Q_SIZE; i++) q->Data[i] = 0; // to simplify our lives when debugging q->Head = 0; q->Tail = 0; q->Size = 0;}int Q_Empty(Q_T * q) { return q->Size == 0;}int Q_Full(Q_T * q) { return q->Size == Q_SIZE;}Embedded Systems 12-11Enqueue and Dequeueint Q_Enqueue(Q_T * q, unsigned char d) { // What if queue is full? if (!Q_Full(q)) { q->Data[q->Tail++] = d; q->Tail %= Q_SIZE; q->Size++; return 1; // success } else return 0; // failure}unsigned char Q_Dequeue(Q_T * q) { // Must check to see if queue is empty before dequeueing unsigned char t=0; if (!Q_Empty(q)) { t = q->Data[q->Head]; q->Data[q->Head++] = 0; // to simplify debugging q->Head %= Q_SIZE; q->Size--; } return t;}Embedded Systems 12-12Now the ISRs#pragma INTERRUPT u0_tx_isrvoid u0_tx_isr() { LED_G = LED_ON; if (!Q_Empty(&tx_q)) u0tbl = Q_Dequeue(&tx_q); LED_G = LED_OFF;}#pragma INTERRUPT u0_rx_isrvoid u0_rx_isr() { LED_Y = LED_ON; if (!Q_Enqueue(&rx_q, u0rbl)) { LED_R = LED_ON; } LED_Y = LED_OFF;}Embedded Systems 12-13Receive Interrupt ExampleReceive interrupt requested when stop bit of message is receivedReceive interrupt servicedEmbedded Systems 12-14Transmit Interrupt ExampleTransmit interrupt requested when transmit register becomes emptyEmbedded Systems 12-15Tying Things Togethervoid d3_send_string(far char * s) { // enqueue a null-terminated string
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