Interrupts and Using Them in C10-1Embedded SystemsUsing Them in CLecture 10In These Notes . . . Interrupts– How they work– Creating and debugging C interrupt routines– Sources• M16C Hardware Manual• P&P 8.1 and 8.5Readings–NewEmbedded Systems 10-2–New• Renesas C Language Programming Manual pp. 109-114• M16C Hardware Manual pp. 75-92– If not already done, read…• “Introduction to Interrupts,” Russell Massey• “Interrupt Latency,” Jack Ganssle• “Introduction to Interrupt Debugging,” Stuart Ball • “Twiddle Bits,” Gauland• “Studs and Duds,” UmanskyInterrupts and PollingConsider the task of making coffee– We need to boil water, but don’t knowexactly how long it will take to boilHow do we detect the water is boiling?– Keep watching the pot until we see bubbles•This is called pollingEmbedded Systems 10-3•This is called polling• Wastes time – can’t do much else– Put the water in a kettle which will whistle upon boiling• The whistle is an interrupt• Don’t need to keep watching water. Instead you can do something else until the kettle whistles.• Much more efficientBreakfast TimelineStart preparing breakfast:Put water in kettle and turn onburnerPut ground coffee in filter in conePut cone on cupGet milk out of fridgeGet cereal from cabinetWater boils and An interrupt occursInterrupt Service RoutineEmbedded Systemsboils and kettle whistlesPut down whatever isin handsTurn off burnerPour boiling water intocoffee filterPick up whatever was put downResume breakfast preparation:Get bowl from cabinetPour cereal into bowlGet spoonPut milk back in fridgeAn interrupt occursInterrupt Service RoutinesAn interrupt service routine (ISR) is a subroutine which is called when a specific event occurs Hardware interrupts are asynchronous: not related to what code the processor is currently executing– Examples: INT0 input becomes active, character is received on serial port, or ADC converter finishes conversionSoftware interrupts are the result of specific instructions executingEmbedded Systems 10-5executing– BRK, INT, undefined instructions– overflow occurs for a given instructionAfter ISR completes, MCU goes back to previously executing codeWe can enable and disable most interrupts as needed, others are non-maskableTMPFLGSequence of Interrupt Activities1. Finish or interrupt current instruction2. Read address 00000h for interrupt source information3. Save flag register FLG in temporary register:4. Clear certain flags in FLG:•Interrupt enable -IEmbedded Systems 10-6•Interrupt enable -I• Debug – D• Stack pointer select – U (except for sw ints 32-63)5. Push the temporary register (which has old FLG) and PC onto stack (see left)6. Set interrupt priority level in IPL7. Fetch interrupt vector from vector table8. Start executing ISR at the target of the vector9. ISR should save any registers which will be modified (compiler does this automatically)M16C62P Hardware Manual, p. 75-92PrioritizationInterrupts are considered simultaneous if they occur between the same two clock ticksInterrupts are prioritized to sort out simultaneous interrupts• Reset (highest priority)• NMI• DBC•Watchdog timerEmbedded Systems 10-7•Watchdog timer• Peripheral I/O• Single step• Address matchPriorities shown in a schematic in M16C62P Hardware Manual pp. 87-88Returning from an ISRRestore any saved registersExecute REIT instruction (6 cycles)– Pop FLG from stack– Pop PC from stackResume executing original codeEmbedded Systems 10-8Interrupt Response TimeWhy do we care?– This is overhead which wastes time, and increases as the interrupt rate rises– This delays our response to external events, which may or may not be acceptable for the application, such as sampling an analog waveformHow long does it take?– Finish executing the current instruction (up to 30 cycles for DIVX) or freeze it–Push various registers on to the stack, fetch vector (18 to 20 cycles)Embedded Systems 10-9–Push various registers on to the stack, fetch vector (18 to 20 cycles)• Depends on alignment of stack pointer and interrupt vector• odd pointers are unaligned (words start at even addresses) so they take 2 cycles each to dereference (follow to memory)– If we have external memory with wait states, this takes longerMaximum 50 cycles to respond– 50 / 12 MHz = 4.166 microseconds -- > need to design for this– If we assume that we need 20 cycles for the body of the ISR and 6 for REIT, the maximum interrupt frequency is 12 MHz / 76 cycles = 157.9 kHzInterrupt VectorsNeed a table to list where the ISRs are located in memory– Each table entry is called a vector– M16C62P Hardware manual p. 78-79Vector format -- four bytes hold address of each ISRTwo kinds of interrupts: fixed and variable (M16C feature)– Fixed have vectors to ISRs at hardware-defined address • Examples: undefined instruction, overflow, BRK, address match, single step, WDT, DBC, UART1, ResetEmbedded Systems 10-10single step, WDT, DBC, UART1, Reset– Variable have vectors to ISRs at user-definable addressWhy have two kinds? – Flexibility for programmer, can use different ISRs in different operating modes– Different MCUs have different interruptsFixed Vector TableRESET: .lword start makes RESET vector point to the function “start”Embedded Systems 10-11Checklist for Using Interrupts in CRead – Software Manual, pp. 247-262– C Language Programming Manual, pp. 109-114Configure MCU– Set up peripheral to generate interrupt– Enable interrupts for system (set I bit in FLG)Write ISR my_isrand identify it as an ISR usingEmbedded Systems 10-12Write ISR my_isrand identify it as an ISR using#pragma INTERRUPT my_isrRegister ISR in interrupt vector tableConfigure Peripheral to Generate InterruptXXXic is interrupt control register for the peripheral (M16C62P Hardware Manual p. 81)At least four fields – look in sfr62p.h for field names• Interrupt level (3 bits)– Sets priority of interrupt. If 0, is disabled. Processor will not respond to interrupts with priority level < processor interrupt priority level – ilvl0_XXXic, ilvl1_XXXic, ilvl2_XXXic.•Interrupt Request (1 bit) –if 1, the condition for generating an Embedded Systems 10-13•Interrupt Request (1 bit) –if 1, the condition for generating an interrupt is true (can read this field even if interrupt is disabled)Configure MCU to respond to the interrupt– Set global interrupt enable flag I (in FLG)• This
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