Micriµm © Copyright 2006, Micriµm All Rights reserved µC/OS-II and ARM Cortex-M3 Processors Application Note AN-1018 HTUwww.Micrium.comUTHµC/OS-II for the ARM Cortex-M3 Processors 2 Table of Contents 1.00 Introduction................................................................................................... 4 2.00 The ARM Cortex-M3 programmer’s model................................................... 6 3.00 µC/OS-II Port for the ARM Cortex-M3 processors...................................... 9 3.01 Directories and Files................................................................................... 10 3.02 OS_CPU.H ................................................................................................. 11 3.02.01 OS_CPU.H, macros for ‘externals’ ............................................................. 11 3.02.02 OS_CPU.H, Data Types............................................................................. 11 3.02.03 OS_CPU.H, Critical Sections...................................................................... 12 3.02.04 OS_CPU.H, Stack growth .......................................................................... 12 3.02.05 OS_CPU.H, Task Level Context Switch ..................................................... 13 3.02.06 OS_CPU.H, Function Prototypes ............................................................... 13 3.03 OS_CPU_C.C............................................................................................. 14 3.03.01 OS_CPU_C.C, OSInitHookBegin()............................................................. 14 3.03.02 OS_CPU_C.C, OSTaskCreateHook() ........................................................ 15 3.03.03 OS_CPU_C.C, OSTaskStkInit() ................................................................. 16 3.03.04 OS_CPU_C.C, OSTaskSwHook() .............................................................. 18 3.03.05 OS_CPU_C.C, OSTimeTickHook() ............................................................ 18 3.03.06 OS_CPU_C.C, OS_CPU_SysTickInit() ...................................................... 19 3.04 OS_CPU_A.ASM........................................................................................ 20 3.04.01 OS_CPU_A.ASM, OS_CPU_SR_Save() ................................................... 20 3.04.02 OS_CPU_A.ASM, OS_CPU_SR_Restore() ............................................... 20 3.04.03 OS_CPU_A.ASM, OSStartHighRdy()......................................................... 21 3.04.04 OS_CPU_A.ASM, OSCtxSw().................................................................... 22 3.04.05 OS_CPU_A.ASM, OSIntCtxSw()................................................................ 23 3.04.06 OS_CPU_A.ASM, OS_CPU_PendSVHandler() ......................................... 23 3.05 OS_DBG.C................................................................................................. 27 4.00 Exception Vector Table .............................................................................. 28 4.01 Exception / Interrupt Handling Sequence ................................................... 29 4.02 Interrupt Controllers.................................................................................... 29 4.03 Interrupt Service Routines .......................................................................... 29 5.00 Application Code ........................................................................................ 30 5.01 APP.C, APP.H and APP_CFG.H................................................................ 31 5.02 INCLUDES.H.............................................................................................. 34 6.00 BSP (Board Support Package) ................................................................... 35 6.01 BSP (Board Support Package) – LED Management .................................. 35µC/OS-II for ARM Cortex-M3 Processors 3 7.00 Conclusion.................................................................................................. 36 Licensing ................................................................................................................... 37 References ................................................................................................................... 37 Contacts ................................................................................................................... 37 Notes ................................................................................................................... 38µC/OS-II for the ARM Cortex-M3 Processors 4 1.00 Introduction ARM has been working on a new architecture called the Cortex for a number of years. During development, µC/OS-II was used to validate some of the design aspects and was used as a source of ideas to create new capabilities to support RTOSs. In other words, µC/OS-II was the first RTOS ported to the Cortex. This application note describes the ‘official’ Micrium port for µC/OS-II on the Cortex-M3 processor. Figure 1-1 shows a block diagram showing the relationship between your application, µC/OS-II, the port code and the BSP (Board Support Package). Relevant sections of this application note are referenced on the figure.µC/OS-II for ARM Cortex-M3 Processors 5 Figure 1-1, Relationship between modules. µC/OS-II OS_CORE.C OS_FLAG.C OS_MBOX.C OS_MEM.C OS_MUTEX.C OS_Q.C OS_SEM.C OS_TASK.C OS_TIME.C OS_TMR.C uCOS_II.H µC/OS-II Cortex M3 Port OS_CPU_C.C OS_CPU_A.ASM OS_CPU.H OS DBG.CYour Application APP.C APP_VECT.C APP_CFG.H INCLUDES.H OS_CFG.H ARM Cortex-M3 / Target Board BSP BSP.C BSP.H Section 2 Section 3 Section 6 Section 5 µC/OS-II BookµC/OS-II for the ARM Cortex-M3 Processors 6 2.00 The ARM Cortex-M3 programmer’s model The visible registers in an ARM Cortex-M3 processor are shown in Figure 2-1. The ARM Cortex-M3 has a total of 20 registers. Each register is 32 bits wide. R0-R12 R0 through R12 are general purpose registers that can be used to hold data as well as pointers. R13 Is generally designated as the stack pointer (also called the SP) but could be the recipient of arithmetic operations. There are actually two stack pointers (SP_process and SP_main) but only one is visible at any given time. SP_process is used for task level code and SP_main is used for exception processing. R14 Is called the Link Register (LR) and is used to store the contents of the PC when a Branch