Using the Stellaris Microcontroller Analog to Digital Converter ADC Application Note AN01 247 0 3 Co pyrigh t 2 007 200 9 Te xas In strumen ts Application Note Using the Stellaris Microcontroller Analog to Digital Converter ADC Copyright Copyright 2007 2009 Texas Instruments Inc All rights reserved Stellaris and StellarisWare are registered trademarks of Texas Instruments ARM and Thumb are registered trademarks and Cortex is a trademark of ARM Limited Other names and brands may be claimed as the property of others Texas Instruments 108 Wild Basin Suite 350 Austin TX 78746 Main 1 512 279 8800 Fax 1 512 279 8879 http www luminarymicro com June 24 2009 2 Application Note Using the Stellaris Microcontroller Analog to Digital Converter ADC Table of Contents Introduction 4 Sample Sequencers 4 Module Configuration Example 5 Module Initialization 6 Sample Sequence Configuration 7 Using ADC Interrupts 10 Data Retrieval 10 Differential Sampling 11 Hardware Averaging Circuit 15 Conclusion 16 References 16 June 24 2009 3 Application Note Using the Stellaris Microcontroller Analog to Digital Converter ADC Introduction Stellaris microcontrollers that are equipped with an analog to digital converter ADC use an innovative sequence based sampling architecture designed to be extremely flexible yet easy to use This application note describes the sampling architecture of the ADC Since programmers can configure Stellaris microcontrollers either through the powerful Stellaris Family Driver Library or through direct writes to the device s control registers this application note describes both methods The information presented in this document is intended to complement the ADC chapter of the device datasheet and assumes the reader has a basic understanding of how ADCs function Sample Sequencers Most analog to digital converter implementations in 8 16 and 32 bit microcontrollers require processor intervention to configure each conversion when the analog input channel is changed Stellaris sequence based architecture gives software the ability to enable up to four separate sample sequences encompassing all of the analog input channels with a single series of configuration writes The ADC module has a total of four sample sequencers that allow sampling of 1 4 there are two 4 beat sequencers or 8 analog sources with a single trigger event see Figure 1 Each sample sequencer has its own set of configuration registers making it completely independent from the other sequencers All steps in a sample sequence are configurable allowing software to select the analog input channel including the temperature sensor single ended or differential mode sampling and whether or not to generate an interrupt after the step completes The sample sequences also have configurable priority to handle cases where multiple sequences are triggered by the same trigger source or trigger simultaneously Figure 1 Sample Sequencer Structure Sample Sequencer 0 Sample Sequencer 1 Sample Sequencer 2 Sample Sequencer 3 Step 0 Step 0 Step 0 Step 0 Step 1 Step 1 Step 1 Step 2 Step 2 Step 2 Step 3 Step 3 Step 3 Step 4 Step 5 Step 6 Step 7 Each step can configure Analog source pin or temperature sensor Interrupt generation Single ended or differential sampling End of sequence A sample sequence can be triggered by various sources including the processor timers analog comparators PWM unit or GPIO For situations where multiple sequences have the same trigger source or are triggered simultaneously the ADC arbitrates execution order based on the configured sequence priorities When a sample sequence is triggered it begins sampling at the programmed sampling rate 250K 500K or 1M samples second depending on the device iterating through the June 24 2009 4 Application Note Using the Stellaris Microcontroller Analog to Digital Converter ADC steps of the sequence Sampling continues until a step has its END bit set indicating the end of the sequence The END bit can be set for any step in the sequence meaning a given sample sequence is not required to collect its maximum number of samples When the sample sequence completes the conversion results are stored in the sample sequence FIFO and can be retrieved by the processor Module Configuration Example To demonstrate the steps required to configure the ADC consider the example shown in Figure 2 There are a total of three sensors being monitored in addition to the on chip temperature sensor Since three analog inputs are used this example assumes the specific Stellaris device has at least three analog inputs Each sample sequence has its own FIFO with the number of slots equivalent to the size of the sequencer Figure 2 Example System Configuration Stellaris Microcontroller Timer trigger Sample Sequencer 1 AN0 Sensor 1 AN1 Sensor 2 AN2 Sensor 3 Step 0 Step 1 Step 2 Step 3 Unused Processor trigger Sample Sequencer 3 Step 0 Temperature Sensor Notice how the analog inputs are mapped to the individual steps in the sample sequencer Since there are three sensor inputs to monitor one of the four step sequencers in this case sample sequence 1 is used The temperature sensor is sampled using sample sequence 3 since it requires only one step and has a separate trigger source If the temperature sensor was configured to have a timer trigger it could be placed in the unused step of sequence 1 Note All code examples in the following sections show both direct register writes reads and API calls to the Stellaris Peripheral Driver Library If attempting to reproduce the direct register access examples the appropriate IC header file for example lm3s811 h for an LM3S811 part must be included These header files one for each member of the Stellaris family can be found in the StellarisWare inc directory in the installed software tree To make use of the Stellaris Peripheral Driver Library instead of direct register access header files hw types h hw memmap h and adc h are required These can be found in the StellarisWare and StellarisWare DriverLib directories June 24 2009 5 Application Note Using the Stellaris Microcontroller Analog to Digital Converter ADC Module Initialization Out of reset all peripheral clocks are disabled to reduce power consumption and must be enabled for each peripheral module Enabling a peripheral s clock is a simple task requiring a write to one of the Run Mode Clock Gating Control RCGCx registers in the System Control module To enable the clock to the ADC write a 1 to bit 16 the ADC bit of the RCGC0 register address