Oscillators 1 Introduction What makes an oscillator 2 Types of oscillators Fixed frequency or voltage controlled oscillator LC resonator Ring Oscillator Crystal resonator Relaxation Multivibrator RC oscillators 3 Design of oscillators Frequency control stability Amplitude limits Buffered output isolation Bias circuits Voltage control Phase noise Oscillator Basics XS a XO XF f A feedback amplifier with positive feedback Gain with feedback is aF X a o 1 af X S What conditions are needed for oscillation af 1 af 0 This is called the Barkhausen criterion Of If the oscillation is to be sustained with Xs 0 no input then X o aX F afX o X F fX o Amplitude is controlled by the magnitude af Frequency is controlled by the phase of af Typically the feedback block is frequency dependent a resonator or filter or phase shift network Considering a resonant circuit like a parallel RLC the phase slope d d will set the frequency o You can see that a change in phase d will result in a change in frequency d A large phase slope produces less frequency variation for a given d What would cause a d A second way to study the operation of oscillators is to evaluate the characteristic equation the roots of which are the circuit poles 1 a s f s 0 For sustained oscillations at o we need roots on the j axis at s j o This would be the case with a factor s2 o2 The inverse Laplace transform gives the solution sin ot An undamped sinusoid j x j o x j o or cos ot LC Oscillators Utilize an LC tank circuit as a resonator to control frequency High Q resonator provides good stability low phase noise The frequency can be adjusted by voltage if desired by using varactor diodes in the resonator Buffer amp gain Zload resonator Bias Circuit For oscillation to begin open loop gain A 1 and A 0 Circuit 1 Consider this tuned amplifier VDD Z C L RP VOUT 90o Z VIN 0 Load The impedance of the resonator peaks Rp and the phase is 0o at 0 The susceptances of the L and C cancel at resonance 90o We represent the MOSFET with its simplest small signal model gm vgs RP The small signal gain is given by Vout gm RP vgs Notice the inversion between input and output This produces a 180 degree phase shift for the stage an inverter The large signal output will be a sine wave with a DC component equal to VDD Since there is very little DC voltage drop across the inductor the average value of the output over one period must be equal to VDD The signal is out of phase with the input The maximum AC output voltage amplitude will be limited by either clipping voltage limiting Vout VDD VDsat or by current limiting Vout IDmax RP The two mechanisms have very different behavior With voltage limiting the output voltage begins to resemble a square wave The odd order harmonic distortion will increase If the circuit is intended to provide good linear amplification or good spectral purity this scenario is to be avoided With current limiting the signal amplitude can be adjusted so that it never reaches clipping It swings above and below VDD without distorting Always build the oscillator so that it current limits Circuit 2 The tuned amplifier can form the core of an oscillator We need to add feedback and one more inversion VDD C L RP C L RP VOUT 180o 0 180o 0 If gm RP 1 this circuit will oscillate It can only oscillate at 0 because only at that frequency will we have a total phase shift of 0o The oscillations will begin when the noise inherent in the transistors is amplified around the loop The strength of the oscillations will build exponentially with time The small signal analysis doesn t provide a limit to this growth Obviously this is wrong The amplitude will reach a limit either by voltage or current The example below is current limiting 2 This circuit is also known as the Cross coupled Oscillator We can redraw it to look like this VDD C L RP C L VOUT RP VOUT 180o 0 180o 0 This representation emphasizes the differential topology The two outputs are 180 degrees out of phase This can be very useful for many applications driving a Gilbert cell mixer for example It has one major shortcoming however Problem amplitude control Vout ID RP Vout can be controlled by adjusting the widths of the active devices This sets the maximum current that the device is capable of providing at a given VGS since ID VGS VT for a deep submicron MOSFET BUT Vout also will depend on VDD because the average VGS VDD in this circuit That means that it may not always be possible to avoid voltage limiting If the device width is reduced too far there may not be sufficient gain for a reliable startup Circuit 3 One popular solution to achieve better amplitude control is to break the ground connection connect the sources and bias the cross coupled pair with a current source VDD C L RP C VOUT L RP VOUT I0 Now the amplitude is controlled by I0 All of this current is steered between either the left or right side of the diff pair Thus the amplitude of the output will be I0 RP This is not perfect because no transistor current source is ideal The current will vary slightly with changes in VDD but it is much more stable than circuit 2 Also the drain substrate capacitances of the MOSFET vary with VDD causing some frequency shift Yet it is much better for most applications than Circuit 2 The only drawback for this design comes from the current source noise The channel noise of the device adds to the total noise of the amplifier so the phase noise of this current biased design is somewhat worse than that of circuit 2 Circuit 4 Colpitts Oscillator Gain C1 RP L Feedback C3 C2 In this configuration the active device is in a common base configuration The open loop gain will be set by the gm of the device by Rp and the capacitive divider The frequency of oscillation is determined by the resonator as in the previous examples To analyze the open loop gain let s open the loop V2 C1 V1 L V1 IE C3 C2 RP An oscillator example Common Base Colpitts This oscillator uses an LC resonator to set the oscillation frequency and a capacitive divider to establish the loop gain The collector voltage is in phase with the input for a common base configuration The goal is to determine the conditions where the open loop gain 1 considering the voltage gain of the amplifier AL and the feedback factor 1 N The loading effects of the device and the unloaded Q of the resonator must be considered in the analysis Here is a partial schematic without biasing details The C1 C2 divider sets the feedback ratio The loop is broken between V1 and