ECE 145A/218A – Power Amplifier Design Lectures Power Amplifier Design 1 5/24/07 1 of 18 Prof. S. Long Power Amplifiers; Part 1 Class A Device Limitations Large signal output match Define efficiency, power-added efficiency Class A operating conditions Thermal resistance We have studied the design of small-signal amplifiers • The designs were based on small-signal S-parameters. • The output was often conjugately matched to increase gain. conjugate match: SS AC Load Line Re ZL{}=Re ZOUT{} IDQVDQIDQVDQECE 145A/218A – Power Amplifier Design Lectures Power Amplifier Design 1 5/24/07 2 of 18 Prof. S. Long The small signal conjugate match leads to limitations on voltage and current swing. Not important for SS amps, but crucial for power amps. ΔV<<VDQΔI << IDQ Power amps require a large-signal design methodology: ΔVand ΔI are significant compared with VDQ and IDQ. Power Amp Objective: Get the largest ΔVand ΔI without: 1. Clipping – large saturation of gain; - distortion generated 2. Destroying the device. • avoid breakdown • IMAX must be within device specs • PDISS must not overheat the deviceECE 145A/218A – Power Amplifier Design Lectures Power Amplifier Design 1 5/24/07 3 of 18 Prof. S. Long Device limitations and clipping. Every device has maximum voltage and current limits. Breakdown voltage: • Electric field large enough to generate electron-hole pair qV> Egap of semiconductor. • Electrons injected into channel from source or into collector from emitter are accelerated in high field. • Collisions transfer energy to Si atoms. Electron is released, accelerates • creates hole. • Electron-hole pairs are then accelerated further generating more electrons, holes. • This leads to rapid increase in current for voltages beyond breakdown AVALANCHE BREAKDOWN!!! SGDElectric fieldelectronsholesSGDElectric fieldelectronsholesECE 145A/218A – Power Amplifier Design Lectures Power Amplifier Design 1 5/24/07 4 of 18 Prof. S. Long Maximum Current GaAs FET: • IDSSfor FET = ID@VGS=0 • ID∝ qnvsat • n ∝ VGS−VT()m • also must avoid forward gate conduction on MESFET or PHEMT Si MOSFET: • Imax specified by foundry or manufacturer • Also must avoid gate oxide breakdown BJT: IMAX is limited by collector electric field profile when mobile charge ≈ fixed charge, Ε=qND−n()xε electric field → 0 transit delay ↑ fT ↓ We will discuss thermal limitations later. Heat generation will limit the operation of all device typesECE 145A/218A – Power Amplifier Design Lectures Power Amplifier Design 1 5/24/07 5 of 18 Prof. S. Long Conjugate Match Revisited. We have learned that max. power transfer occurs when RL= RdS. true for small signal condition -no device limitations. But what happens when we have limitations on voltage and current? Suppose Vmax=10V,Imax=1A, RdS=100Ω 1. Conjugate Match. RL|| RdS= 50Ω=RL′ VOUT= Imax⋅RL′= 50V ! clearly, Imax can’t be reached since Vmax=10V POUT=Vmax/2()22RL′=25100=14W jB-jBRdsRLILVOUT+-IdjB-jBRdsRLILVOUT+-IdECE 145A/218A – Power Amplifier Design Lectures Power Amplifier Design 1 5/24/07 6 of 18 Prof. S. Long 2. Load Line Match. RL=VmaxImax=10Ω POUT=2520=1.25W This uses the maximum capability of the device more realistically, improvement of 2-3 dB is typical Here you can see the large signal load line with slope 1/RL IDQVDQVBRIMAXVDsatIDQVDQVBRIMAXVDsatECE 145A/218A – Power Amplifier Design Lectures Power Amplifier Design 1 5/24/07 7 of 18 Prof. S. Long We have now shown that different criteria are used for output matching a power amp than a small signal amp. You may have noticed that the large signal load line doesn’t extend to VDS = 0. To avoid excessive distortion, we must also take into account the “knee” voltage (VDsat or VCEsat). Clipping will occur if the drain voltage swing extends into the ohmic region of the device characteristic. Thus, our definition of the large signal load line resistance must take this into account: BRkneeLmaxVVRI−= for maximum voltage swing Some additional PA concepts Efficiency OUTDCPx100%Pη= Power Dissipation DDC OUTPP P=−  Must be removed as heat.  PD can also limit the maximum POUT  Tmax = 150o CECE 145A/218A – Power Amplifier Design Lectures Power Amplifier Design 1 5/24/07 8 of 18 Prof. S. Long Power-Added-Efficiency OUT INDCPPPAEP−= Gain should be at least 10dB to avoid significant reduction in PAE. Efficiency is important because 1) PA’s are used for power 2) Wasted power must be removed as heat 3) Wasted power consumes batteries faster Suppose Pout = 10 kW (FM broadcast transmitter) η (%) PD (kW) PDC (kW) 90 1.1 11.1 50 10 20 25 30 40 10 90 100 PINPDCPOUTPINPDCPOUTECE 145A/218A – Power Amplifier Design Lectures Power Amplifier Design 1 5/24/07 9 of 18 Prof. S. Long First PA: Class A. • Most similar to small-signal amp. • VDQ and IDQ set so that amp is always on. • conduction angle = "on" timeT⋅2π= 2π Case 1 : resistive load. bad idea for PA, but familiar. (we will refer later to this VDC as VDC1) Neglecting Vknee, we find DCBRLmax CQVVRI2I== VDCRLICQVCQ=VDC/2VDC= VBRIMAX= 2 ICQICQVCQ=VDC/2VDC= VBRIMAX= 2 ICQECE 145A/218A – Power Amplifier Design Lectures Power Amplifier Design 1 5/24/07 10 of 18 Prof. S. Long ICθ()= ICQ+ Imsinθ (θ=ωt) Maximum value of mCQII= (just begins to clip) We can see that the average DC component is ICQ and the fundamental component of current is Im, OR: We can use Fourier integrals to determine PDC and POUT. The DC term (a0) can be used to calculate power dissipation: ()DCDC c2VPid20πθθπ=∫ DCCQ m DC CQ2VIIsin d V I20πθθπ⎡⎤=+=⎣⎦∫ constant DC power, constant input current. You can use Fourier integrals to also find coefficients for fundamental and harmonics. T = 2π ()T2T/201afxdxT−=∫ () ()T2nT22a f x sin nx dxT−=∫ () ()T2T2n2b f x cos nx dxT−=∫ECE 145A/218A – Power Amplifier Design Lectures Power Amplifier Design 1 5/24/07 11 of 18 Prof. S. Long Power at fundamental frequency ω: n =1 ()21 m OUT m m1aI i I sin d Iωθθπππ== =−∫ 2sin dπθθππ−⎡⎤⎢⎥=⎢⎥⎣⎦∫ POUT=12Re VmIm*{}=12VmImVm=VDC2; Im=VmRL Thus: 1 max 1 maxI122 2 8DC DCVI