Digital Systems Vias I CMPE 6501 (4/17/08)UMBCU M B CUNIVERSITY OF MARYLAND BALTIMORE COUNTY1 9 6 6ViasA via in a printed circuit board can be used for mounting a through-holecomponent or for routing traces between layers.Electrically, both of these types have similar characteristics.Physically, the through-hole via has a pin while the routing trace doesnot.Mechanical details of viasSmaller vias allow more routing area, and are attractive for designersconcerned with product size.Also, smaller vias have smaller parasitic capacitance, and work better forhigh speed products.However, smaller vias cost more to produce.Via diameter, pad size and spacing are the three elementary componentsto vias.Digital Systems Vias I CMPE 6502 (4/17/08)UMBCU M B CUNIVERSITY OF MARYLAND BALTIMORE COUNTY1 9 6 6Mechanical Details of ViasA through-hole via must accommodate a physical component lead.Typical finished inside diameters range between 0.010 to 0.028 in.Not much can be done to reduce this.For trace routing, the required finished diameter is constrained by drillingand plating technology.Smaller holes require smaller drill bits, which tend to break more often thanbig ones.Electroplating does not penetrate a deep, skinny hole.Holes deeper than 6 times their diameter will not plate uniformly, whichlimits hole diameters to 0.010 in. for standard boards 0.063 in. thick.Digital Systems Vias I CMPE 6503 (4/17/08)UMBCU M B CUNIVERSITY OF MARYLAND BALTIMORE COUNTY1 9 6 6Mechanical Details of ViasEvery via requires additional space for a pad and for clearance around thepad.The pad electrically connects the plated interior of the via to the traces on thesurface or within the board.The appropriate size of the pad is determined by four factors:• Plating allowance• Hole diameter tolerance• Hole alignment allowance• Required annular ringA via is drilled and then plated.Plating coats the interior of the hole and builds up a conductive surfaceabout 0.001-0.002 in. thick, making the diameter 0.002-0.004 smaller.The difference between the drilled hole size and the maximum plating thick-ness is plating allowance.Digital Systems Vias I CMPE 6504 (4/17/08)UMBCU M B CUNIVERSITY OF MARYLAND BALTIMORE COUNTY1 9 6 6Mechanical Details of ViasIt follows that the plating allowance is twice the maximum plating thickness.Holes are drilled with a hole diameter tolerance, e.g., 0.032 +- 0.003 in.However, a small hole with variation that makes it smaller is not acceptable.Therefore, the nominal hole size is increased slightly to prevent this.This oversizing adds to the plating allowance (given above).Component leadClearance forsolderingFinisheddiameterDrilleddiameterDigital Systems Vias I CMPE 6505 (4/17/08)UMBCU M B CUNIVERSITY OF MARYLAND BALTIMORE COUNTY1 9 6 6Mechanical Details of ViasThe hole alignment allowance accounts for error in the drilling location.The drilling machine attaches to special reference holes provided on theboard, which are also used during the etching process for alignment.The manufacturer specifies a hole alignment allowance which specifies thelevel of error in the drilled holes from the nominal etched pad centers.It includes both drilling and etching alignment errors.Point of thinnestannular ringMin drilled diameterMax drilled diameterHole alignment allowance(worst case, HA)Copper padhole +/- HDDigital Systems Vias I CMPE 6506 (4/17/08)UMBCU M B CUNIVERSITY OF MARYLAND BALTIMORE COUNTY1 9 6 6Mechanical Details of ViasA hole that is drilled off center may break through the annular ring, a condi-tion called breakout.If it occurs on the trace side of the pad, it can jeopardize electric contactbetween the trace and the interior portion of the via.The required annular ring specifies the minimum amount of copper pad sur-rounding the via under worst-case drilling.Breakout: Here, traceis connected only toa small portion of viawallLayout optionthat creates abulge on tracesideDigital Systems Vias I CMPE 6507 (4/17/08)UMBCU M B CUNIVERSITY OF MARYLAND BALTIMORE COUNTY1 9 6 6Mechanical Details of ViasThe minimum pad diameter, PD, can be calculated as:PAD = FD + PA + 2(HD + HA + AR)FD: required min. finished hole diameterPA: plating allowanceHD: hole diameter toleranceHA: hole alignment allowanceAR: annular ring requiredAnd the correct nominal drilled hole diameter is:HOLE = FD + PA + HDClearance Requirements: Air GapThe space between copper features on a PCB is called an air gap.For digital applications, only a small air gap is needed to prevent arcing.Here, solder bridges are much more common mode of failure.Digital Systems Vias I CMPE 6508 (4/17/08)UMBCU M B CUNIVERSITY OF MARYLAND BALTIMORE COUNTY1 9 6 6Clearance Requirements: Air GapImperfections in the etching process cause solder bridging, that occurs dur-ing assembly.The minimum safe clearance that prevents solder bridges depends on:• Precision of the etching process• Assembly method• Required yieldThe manufacturer will have a line width tolerance, which defines the precision.Subtract this value from the nominal air gap when calculating the worstcase clearance.Each feature extends a maximum of 1/2 the line width tolerance (reasonfor subtracting it only once).Wave soldering (wave of solder passed over board) and reflow soldering(solder paste heated) are the two major types of assembly processes.Wave soldering is more prone to solder bridges.Digital Systems Vias I CMPE 6509 (4/17/08)UMBCU M B CUNIVERSITY OF MARYLAND BALTIMORE COUNTY1 9 6 6Clearance Requirements: Air GapThrough-hole soldering always uses wave soldering.Surface mount boards can use either or both.With regard to yield, the requirements here depend on volume and cost.At low volumes, you may choose to perform a visual inspection toremove any solder bridges.At high volumes, it is better to spend extra design effort on locating andfixing clearance problems.Note that both etching imperfections and solder bridges are random phe-nomena.Increasing air gaps reduces their probability but never completely eliminatesthem.Digital Systems Vias I CMPE 65010 (4/17/08)UMBCU M B CUNIVERSITY OF MARYLAND BALTIMORE COUNTY1 9 6 6Trace-Routing Density Vs. Via Pad SizePCB cost is proportional to the number of layers and the number of layersdepends on the wiring density of each layer.Wiring density is measured in units of average trace pitch, with trace pitchdefined as the minimum center-to-center spacing of two