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Stanford CS 140 - Memory and I or O buses

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Memory and I/O busesRealistic PC architectureWhat is memory?What is I/O bus? E.g., PCICommunicating with a deviceDMA buffersExample: Network Interface CardExample: IDE disk with DMADriver architectureInterrupt driven devicesAnatomy of a diskDiskDiskDiskStorage on a magnetic platterCylinders, tracks, & sectorsDisk positioning systemSeek detailsSectorsSectorsDisk interfaceSCSI overviewSCSI requestsExecuting SCSI commdnsSCSI exceptions and errorsDisk performanceScheduling: FCFSScheduling: FCFSShortest positioning time first (SPTF)Shortest positioning time first (SPTF)``Elevator'' scheduling (SCAN)``Elevator'' scheduling (SCAN)VSCAN(r)Memory and I/O busesI/O bus1880Mbps 1056MbpsCrossbarMemoryCPU• CPU acc e s s e s physical memory ove r a bus• Devices acc e s s memory over I/O bus with DMA• Devices can appear to be a region of memory– p. 1/27Realistic PC architec t ureAdvancedProgramableInterruptControllerbusI/OAPICCPUBridgeMainmemoryNorthbussidefront-SouthBridgebusISACPUUSBbusAGPPCIIRQsbusPCI– p. 2/27What is memory?• SRAM – Static RAM- Like two NOT gates circularly w ired input-to-output- 4–6 transistors per bit, actively holds its value- Very fast, used to cache slower memory• DRAM – Dynamic RAM- A capacitor + gate, holds charge to indicate bit value- 1 transistor per bit – extremely dense storage- Charge leaks—need slow comparator to decide if bit 1 or 0- Must re-write charge after reading , and periodically refresh• VRAM – “Video RAM”- Dual ported, can write while someone else reads– p. 3/27What is I/O bus? E.g., PCI– p. 4/27Communicating with a devic e• Memory-mapped device registers- Certain physical addresses correspond to device registers- Load/store gets status/sends instructions – not real memory• Device memo ry – device may have memory OS c a nwrite to directly on other side of I/O bus• Special I/O instructions- Some CPUs (e.g., x 86) have special I/O instructions- Like load & store, but asserts special I/O pin on CPU- OS can allow user-mode access to I/O ports with finergranularity than page• DMA – place instructions to card in main me m ory- Typically then need to “poke” card by writing to register- Overlaps unrelated computation with moving data over(typically slower than memory) I/O bus– p. 5/27DMA buffersBufferdescriptorlistMemory buffers1001400150015001500…• Include list of buffer locations in main memory• Card reads list then accesses buffers (w. DMA)- Allows for scatter/gather I/O– p. 6/27Example: Network Interface CardHost I/O busAdaptorNetwork linkBusinterfaceLinkinterface• Link interface talks to wire/fibe r/antenna- Typically does framing, link-layer CRC• FIFOs on card provide small amount o f buffering• Bus interface logic uses DMA to move packets to andfrom buffers in main memory– p. 7/27Example: IDE disk with DMA– p. 8/27Driver architecture• Device driver provides severa l entry points to kernel- Reset, ioctl, output, interrupt, read, write, strategy . . .• How should driver synchronize with card?- E.g., Need to know when transmit buffers free or packets arrive- Need to know when disk request complete• One approach: Polling- Sent a packet? Loop asking card when buffer is free- Waiting to receive? Keep asking card if it has packet- Disk I/O? Keep looping until disk ready bit set• Disadvantages of polling- Can’t use CPU for anything else while polling- Or schedule poll in future and do something else, but then highlatency to receive packet or process disk block– p. 9/27Interrupt driven devices• Instead, ask card to interrupt CPU on events- Interrupt handler runs at high priority- Asks card w hat happened (xmit buffer free, new packet)- This is what most g eneral-purpose OSes do• Bad under high network packet arrival rate- Packets can arrive faster than OS can process them- Interrupts are very expensive (context switch)- Interrupts handlers have high priority- In worst case, can spend 100% of time in interrupt handler andnever make any progress – receive livelock- Best: Adaptive switching between interrupts and polling• Very good for disk requests• Rest of today: Disks (network devices in 1.5 weeks)– p. 10/27Anatomy of a disk• Stack of magnetic platters- Rotate together on a central spindle @3,600-15,000 RPM- Drive speed drifts slowly over time- Can’t predict rotational position after 100-200 revolutions• Disk arm assembly- Arms rotate around pivot, all move together- Pivot offers some resistance to linear shocks- Arms contain disk heads–one for each recording surface- Heads read and write data to platters– p. 11/27Disk– p. 12/27Disk– p. 12/27Disk– p. 12/27Storage on a mag ne tic plat te r• Platters divided into concentric tracks• A stack of tracks of fixed radius is a cylinder• Heads record and sense data along cylinders- Significant fractions of encoded stream for error correction• Generally only one head active at a time- Disks usually have one set of read-write circuitry- Must worry about cross-talk between channels- Hard to keep multiple heads exactly aligned– p. 13/27Cylinders, trac ks , & se c t o rs– p. 14/27Disk positio ning sy s tem• Move head to specific track and keep it there- Resist physical socks, imperfect tracks, etc.• A seek co nsists of up to four pha s e s :- speedup–accelerate arm to max speed or half way point- coast–at max speed (for long seeks)- slowdown–stops arm near destination- settle–adjusts head to actual desired track• Very short seeks dominated by settle time (∼1 ms)• Short (200 -40 0 cyl.) seeks dominated by speedup- Accelerations of 40g– p. 15/27Seek details• Head switches comparable to short seeks- May also require head adjustment- Settles take longer for writes than reads• Disk keeps table of pivot motor power- Maps seek distance to power and time- Disk interpolates over entries in table- Table set by periodic “thermal recalibration”- 500 ms recalibration every 25 min, bad for AV• “Average seek time ” quoted can be many things- Time to seek 1/3 disk, 1/3 time to seek whole disk,– p. 16/27Sectors• Disk interface presents linear array of sectors- Generally 512 bytes, written atomically• Disk maps logical sector #s to physical sectors- Zoning–puts more sectors on longer tracks- Track skewing–sector 0 pos. varies by track (why?)- Sparing–flawed sectors remapped elsewhere• OS doesn’t know logical to physical sector mapping- Larger logical sector #


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Stanford CS 140 - Memory and I or O buses

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