Overview Of LectureMonolithic CapacitancesSingle Conductor Over GroundSingle Conductor Parasitic CCapacitor SandwichCapacitance Of Sandwiched ConductorComments On Sandwiched ConductorMonolithic InductanceBond Wire InductanceBond Wire Inductance ProfileCoupled Bond WiresSquare Spiral InductorHollow Spiral InductorCircuit Model For Spiral InductorSpiral Model ParametersComments On The Spiral InductorInterconnect IssuesUniform Transmission LineTransmission Line AnalysisTransmission Line SolutionCharacteristic ImpedanceTwo-Port FormulationZ—Parameter ModelHandy Dandy Hyperbolic IdentitiesY—Parameter ModelFloating Transmission LineExample: Indefinite ApplicationPropagation ConstantTerminated Transmission LineMatch—Terminated LineComments On Match TerminationLossless Transmission LineLossless Quarter Wave LineLossless Half Wave LineEE 541Class LectureWeeks 11-12Prof. John Choma, ProfessorDepartment of Electrical Engineering-ElectrophysicsUniversity of Southern CaliforniaUniversity Park; MC: 0271; PHE #604Los Angeles, California 90089-0271213-740-4692 [USC Office]213-740-7581 [USC Fax][email protected] Lines and IC Interconnect ParasiticsFall 2006 SemesterUniversity of Southern CaliforniaChoma: EE 541230Overview Of LectureOverview Of Lecturez Integrated Circuit Capacitors Single Conductor Over Ground Plane Capacitor Sandwiches Capacitor Metrics And Modelsz Integrated Circuit Inductances Bond Wire Spirals Inductor Metrics And Modelsz Distributed Phenomena Transmission Line Models For Interconnects Distributed Model Response Characteristics And Performance MetricsUniversity of Southern CaliforniaChoma: EE 541231Monolithic CapacitancesMonolithic Capacitancesz Chip Capacitance Indigenous To All Chip Interconnect Metalization Parasitic Capacitance Of Metalization Critical In RF Circuits Capacitance EquationsPertinent To Metalization ParasiticsPertinent To Actual Capacitor RealizationsMathematical Relationships¾Semi-Empirical¾Accounts For Fringing And Other Parasitic Phenomenaz Capacitance Types Single Conductor Over Ground Plane Conductor Sandwiched Between Two Ground Planes Conductor Sandwiched Between Two Conductors Lying Over Ground PlaneUniversity of Southern CaliforniaChoma: EE 541232LWMetal ConductorTop ViewWTMetalHCross SectionGround Planez Diagramz TotalCapacitanceTo Ground CT= C + Cp= C(1 + ηp) C Is Natural “Parallel Plate” Capacitanceε Is Dielectric Constant Of Medium Having Thickness HIf Medium Is Silicon, ε = 1.05 pF/cm CpIs Parasitic “Fringing” Capacitance Normalized Parasitic Capacitance Is ηp The Larger W Is In Comparison With H And The Geometric Mean Of T And H, The Smaller Is The Parasitic Capacitive ComponentεWLCH=ppC η C=0.75ppCHHTHη 0.77 1.06CW WW =≈ + + Single Conductor Over GroundSingle Conductor Over GroundUniversity of Southern CaliforniaChoma: EE 541233Single Conductor Parasitic CSingle Conductor Parasitic C11/622/633/623456789:21Metal Width -To- Ground Height, W/HParasitic Capacitance Factor, Cp/CT/H = 0.1T/H = 0.001University of Southern CaliforniaChoma: EE 541234Capacitor SandwichCapacitor SandwichLWMetal ConductorTop ViewWTMetalH1Conductive PlaneH2Conductive Planez Diagramz Total CapacitanceTo Ground CT= C + Cp= C(1 + ηp) C Is Natural “Parallel Plate” Capacitance CpIs Parasitic “Fringing” Capacitance Normalized Parasitic Capacitance Is ηp The Larger W Is In Comparison With H And The Geometric Mean Of T And H, The Smaller Is The Parasitic Capacitive ComponentεWLCH=ppC η C=0.2520.75p21p2122CHHHHTHη 0.77 0.89 1CW WWHHH =≈ + + + + 1212HHHHH+University of Southern CaliforniaChoma: EE 541235Capacitance Of Sandwiched ConductorCapacitance Of Sandwiched Conductorz Diagramz Parasitic Capacitance FactorLWMetal ConductorTop Vi ewWTMetalHSCross SectionGround PlaneAdjacentMetal ConductorAdjacentMetal ConductorAdjacentMetal ConductorSSSAdjacentMetal ConductorεWLCH=ppC η C=0.222 0.222 1.34ppCHT T HT Hη 0.15 2.8 0.06 1.66 0.14CWH WWHS =≈+ + + − ()TpC1η C=+University of Southern CaliforniaChoma: EE 541236Comments On Sandwiched ConductorComments On Sandwiched ConductorLWMetal ConductorTop ViewAdjacentMetal ConductorAdjacentMetal Conductorz Top View Diagramz Parasitic Factor Is First OrderEstimate Of Parasitic OfMonolithic Capacitance z Note Parasitic Factor Larger Than 15% Of NaturalParallel Plate Capacitance Synergistic With OriginallyDisclosed Estimate Of 15%-30%z Parasitic Capacitance FactorSS0.222 0.222 1.34ppCHT T HT Hη 0.15 2.8 0.06 1.66 0.14CWH WWHS =≈+ + + − University of Southern CaliforniaChoma: EE 541237Monolithic InductanceMonolithic Inductancez Inductance Types Bond WireAssociated With Package -To- Chip ConnectionsBond Wire Inductances Have Reasonably High QBond Wire Inductance Expressions Are Nominally Applicable To Parasitic Series Inductances Associated With On-Chip Interconnects SpiralsCommon Monolithic Inductance Synthesis StrategyQuality Factor Largely Limited By Skin EffectQuality Factor Also Limited By Manhattan Layout Rules Which Discourage Circular Or Elliptical Inductor LayoutsHigh Quality Factors¾Demand Multi-Layer Metalization¾Progress Recently Made With Stacked Inductancesz Inductance Expressions Empirical Expressions Deduced From Field Solver Software Expressions Account To First Order For Fringing and Other High Order PhenomenaUniversity of Southern CaliforniaChoma: EE 541238ldMetal ConductorLsz Diagramz Comments Bond Wires HaveRelatively Large Surface Area -Per- Unit LengthSmall Series Resistance (typically 125 milli-ohms/mm)Relatively High Q (40-50 Not Uncommon) Formula Below Presumes No Coupling With Proximate Conductors Bond Wires Have Relatively Small Parasitic Capacitance To GroundPlaced Far Above Conductive PlanesVery High Self-Resonant Frequenciesz Bond Wire
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