Overview Of LectureActive IntegratorsOTA-C (Integrator) ModelOTA-C Transfer RelationshipOTA-C Error FunctionOTA-C Error MagnitudeOTA-C Delay ResponseOTA-C Example Delay PlotOTA-C Example Error MagnitudeComments On Error ExampleCompensated OTA-CCompensated OTA-C AnalysisCompensated Analysis - Cont’dCompensated OTA-C PassbandOTA-C Integrator ExamplesSimulated OTA-C Gain ResultsSimulated OTA-C Phase ResultsComments On OTA-C ResultsOTA-C Integrator BiasingDifferential OTA-C IntegratorActive Resistance ApplicationFloating Tunable ResistanceActive Impedance TransformerGyratorComments On GyratorIdealized GyratorPractical GyratorPractical Gyration RatioCapacitance ConversionExample Gyrator PerformanceFirst Order Lowpass FilterActive Delay NetworkExample Delay And Magnitude ResponsesComments On Delay NetworkQuadrature (I/Q) OscillatorComments On I/Q OscillatorBiquadratic Filter IssuesLowpass Biquadratic FilterLowpass Biquadratic ResponseDelay Application Of Lowpass FilterLowpass Filter Delay ResponseComments On Lowpass FilterBandpass Biquadratic FilterBandpass Frequency ResponseBandpass Phase ResponseNotch Biquadratic FilterNotch Magnitude ResponseNotch Phase ResponseBiquadratic Signal FlowBiquadratic Signal Flow DiagramBiquadratic Filter RealizationDifferential Biquadratic FilterBiquadratic Design EquationsEE 541Class LectureWeek 6Prof. John Choma, ProfessorDepartment of Electrical Engineering-ElectrophysicsUniversity of Southern CaliforniaUniversity Park; MC: 0271; PHE #604Los Angeles, California 90089-0271213-740-4692 [USC Office]213-740-7581 [USC Fax][email protected] ApplicationsFall 2006 SemesterUniversity of Southern CaliforniaChoma: EE 541128Overview Of LectureOverview Of Lecturez Miscellaneous Applications Open Loop Integrator Active Tunable Resistance Lowpass Tunable Amplifiers Gyrator-Based Active Inductors Impedance Transformers Quadrature Oscillatorz Biquadratic Filters Filter ExamplesLowpassHighpassBandpassNotchDelay Generalized ArchitectureUniversity of Southern CaliforniaChoma: EE 541129+−VsRsCVo+−GmPhaseInverting+−VsRsCVo−+GmNon-PhaseInverting+−−+VsRsCVoz Conventional Op-Amp Integrator Feedback Demands Op-Amp Pole Dominance Band-Limited By Op-Amp Compensation Unity Gain Frequency (ωm) DependentOn Source Resistancez Transconductor Integrator (OTA-C) Open Loop; No Feedback Better Frequency Response Than Op-Amp Unity Gain Frequency Independent Of SourceResistancez Note 90º Phase Shift In All IntegratorsomssV ω1VsRCs=− =−ommsVG ω±±VsCs==Active IntegratorsActive IntegratorsUniversity of Southern CaliforniaChoma: EE 541130+−VsRsCVoVo+−GmPhaseInvertingGVmiroCoCrCCi+−VsRs +−V iz Ideal Integrator Infinite Input Impedance Infinite Output Impedance 90º Relative Phase Shiftz Practical Integrator Input Capacitance (Ci) Output Capacitance (Co) Feedback Capacitance (Cr) Output Resistance (ro)omusVG ωVsCs=− =−moros12sGr 1zVVss11pp−=−++zDesign ObjectivesNegligible Cr(Plausible For Multistage)Small Source Resistance, RsVery Large roDominant Net Output CapacitanceOTAOTA--C (Integrator) ModelC (Integrator) ModelUniversity of Southern CaliforniaChoma: EE 541131OTAOTA--C Transfer RelationshipC Transfer Relationshipz Pole Dominance Set At Output Port Large ro Appended Capacitance, Cz Error FunctionVoGVmiroCoCrCCi+−VsRs +−V i()oo12 111 1rC Cpp p+≈≈ +mrrGzC=()soo i si12 211Rr C C C RCpp p=+→≈moros12sGr 1zVH(s)Vss11pp−==−++uru12ωs1szωH(s) ε(s)sps11sp−=− =−++r12s1zε(s)ps11sp−++muoGωCC=+University of Southern CaliforniaChoma: EE 541132uru12ωs1szωH(s) ε(s)sps11sp−=− =−++z Error Function Ideally Is Unity For All Frequencies Unity Approximation Requires:z Design For Acceptable Integration Characteristics Error Magnitude Must Approach Unity Over Desired Passband Error Phase Must Approach Zero Over Desired PassbandEquivalently, Integrator Delay, Which Is Negative Frequency Derivative Of Phase, Must Approach Zero Over PassbandPhase Or Delay Characteristics More Difficult To Satisfy Than Magnituder12s1zε(s)ps11sp−++muoGωCC=+1mouus2uiumrrup1Gr1ωω11Rp ω Cω G1Cz ω<< → >><< → <<<< → <<OTAOTA--C Error FunctionC Error FunctionUniversity of Southern CaliforniaChoma: EE 541133OTAOTA--C Error Magnituder11221jω z1ε(jω)ppjω jω11 1j1jω p ω p−=≈ ++ − + C Error Magnitudez Ignore RHP Zero Self-Aligning Gates Multistage Architecture Small Device Geometryz Magnitude At Low Frequencies Pole At p1Is Dominant Ensure |ε(jω)| ≥ 0.9 (No More than 10% Error) Implies ω≥ 2.065p1or (ω/ωu) ≥ 2/Gmro Likely To Prove Inconsequential In Light Of Delay Constraintz Magnitude At High Frequencies Pole At p2Is Dominant Ensure |ε(jω)| ≥ 0.9 (No More than 10% Error) Implies ω≤0.484p2or ω≤1/2RsCi Sets Input Port Time Constant For Acceptable High Frequency Error Magnitude Response DegradationUniversity of Southern CaliforniaChoma: EE 541134OTAOTA--C Delay ResponseC Delay Responsez Delay Criterion Ideal Integrator Has Zero Delay Acceptable Delay Is Generally Smaller Than 0.1/ωuz Phase And Delay Zero Continues To Be Tacitly Ignored Delay Decreases Monotonically With Frequency D(ω) ≤ 1/ωuImplies: Sets Viable Lower Limit Of Integrationz Integration Passband1112pωφ(ω)ω ptan tan−−=−1222 2212ppdφ(ω)D(ω)dωω p ω p== +++−()uusi moω 1ω1-ω RC G r≥()uusiusi mo1 ω 1ω 2ω RC1 ω RC G r≤≤−Set ByDelaySet ByMagnitudeUniversity of Southern CaliforniaChoma: EE 54113500.20.40.60.811. 21. 40.10 0.25 0.63 1.58 3.98 10.00Normalized Signal FrequencyNormalized Delay0.128Lower FrequencyOf Integration2urumopωzω312Gr 100===OTAOTA--C Example Delay
View Full Document